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I2S Registers
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22.10.1.23 STMPWCNT Register (Offset = 5Ch) [reset = X]
STMPWCNT is shown in Figure 22-30 and described in Table 22-24.
Current Value of WCNT
Figure 22-30. STMPWCNT Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED CURR_VALUE
R-X R-X
Table 22-24. STMPWCNT Register Field Descriptions
Bit Field Type Reset Description
31-16 RESERVED R X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
15-0 CURR_VALUE R X
Current value of the WCLK counter
1446
Integrated Interchip Sound (I2S) Module SWCU117A–February 2015–Revised March 2015
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