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I2S Registers

22.10.1.16 STMPWCNTCAPT0 Register (Offset = 40h) [reset = X]

STMPWCNTCAPT0 is shown in Figure 22-23 and described in Table 22-17.

Captured WCLK Counter Value, Capture Channel 0

Figure 22-23. STMPWCNTCAPT0 Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RESERVED CAPT_VALUE

R-X R-X

Table 22-17. STMPWCNTCAPT0 Register Field Descriptions

Bit Field Type Reset Description

31-16 RESERVED R X

Software should not rely on the value of a reserved. Writing any

other value than the reset value may result in undefined behavior.

15-0 CAPT_VALUE R X

The value of the samplestamp WCLK counter

(STMPWCNT.CURR_VALUE) last time an event was pulsed (event

source selected in EVENT:I2SSTMPSEL0.EV for channel 0). This

number corresponds to the number of positive WCLK edges since

the samplestamp generator was enabled (not taking modification

through STMPWADD/STMPWSET into account). The value is

cleared when STMPCTL.STMP_EN = 0.

1439

SWCU117A–February 2015–Revised March 2015 Integrated Interchip Sound (I2S) Module

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