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I2S Registers

22.10.1.2 AIFDMACFG Register (Offset = 4h) [reset = X]

AIFDMACFG is shown in Figure 22-9 and described in Table 22-3.

DMA Buffer Size Configuration

Figure 22-9. AIFDMACFG Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RESERVED

R-X

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RESERVED END_FRAME_IDX

R-X R/W-X

Table 22-3. AIFDMACFG Register Field Descriptions

Bit Field Type Reset Description

31-8 RESERVED R X

Software should not rely on the value of a reserved. Writing any

other value than the reset value may result in undefined behavior.

7-0 END_FRAME_IDX R/W X

Defines the length of the Writing a non-zero value to this registerfield

enables and initializes AIF. Note that before doing so, all other

configuration must have been done, and AIFINPTR/AIFOUTPTR

must have been loaded.

1425

SWCU117A–February 2015–Revised March 2015 Integrated Interchip Sound (I2S) Module

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