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I
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21.5.1.18 MCR Register (Offset = 820h) [reset = X]
MCR is shown in Figure 21-31 and described in Table 21-20.
Master Configuration This register configures the mode (Master or Slave) and sets the interface for test
mode loopback.
Figure 21-31. MCR Register
31 30 29 28 27 26 25 24
RESERVED
R/W-X
23 22 21 20 19 18 17 16
RESERVED
R/W-X
15 14 13 12 11 10 9 8
RESERVED
R/W-X
7 6 5 4 3 2 1 0
RESERVED SFE MFE RESERVED LPBK
R/W-X R/W-X R/W-X R-X R/W-X
Table 21-20. MCR Register Field Descriptions
Bit Field Type Reset Description
31-6 RESERVED R/W X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
5 SFE R/W X
I2C slave function enable
0h = Slave mode is disabled.
1h = Slave mode is enabled.
4 MFE R/W X
I2C master function enable
0h = Master mode is disabled.
1h = Master mode is enabled.
3-1 RESERVED R X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
0 LPBK R/W X
I2C loopback 0: Normal operation 1: Loopback operation (test mode)
0h = Disable Test Mode
1h = Enable Test Mode
1410
SWCU117A–February 2015–Revised March 2015
Inter-Integrated Circuit (I
2
C) Interface
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