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I
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21.5.1.12 MDR Register (Offset = 808h) [reset = X]
MDR is shown in Figure 21-25 and described in Table 21-14.
Master Data This register contains the data to be transmitted when in the Master Transmit state and the
data received when in the Master Receive state.
Figure 21-25. MDR Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED DATA
R-X R/W-X
Table 21-14. MDR Register Field Descriptions
Bit Field Type Reset Description
31-8 RESERVED R X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
7-0 DATA R/W X
When Read: Last RX Data is returned When Written: Data is
transferred during TX transaction
1404
SWCU117A–February 2015–Revised March 2015
Inter-Integrated Circuit (I
2
C) Interface
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