User manual
I2C_MDR
I2C_MTPR
I2C_MCTRL
I2C_MSA
I
2
C Control
I2C_MMIS
I2C_MICR
I2C_MRIS
I2C_MIMR
I2C_MCR
I2C_SDR
I2C_SIMR
I2C_SCTL
I2C_SOAR
I2C_SICR
I2C_SMIS
I2C_SRIS
I
2
C Master Core
I
2
C Slave Core
I
2
C I/O Select
I2CSDA
I2CSCL
I2CSCL
I2CSDA
I2CSDA
I2CSCL
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Inter-Integrated Circuit Interface
21.1 Inter-Integrated Circuit Interface
The I
2
C bus provides bidirectional data transfer through a 2-wire design (a serial data line [SDA] and a
serial clock line [SCL]), and interfaces to external I
2
C devices such as serial memory (RAMs and ROMs),
networking devices, LCDs, tone generators, and so forth. The I
2
C bus may also be used for system testing
and diagnostic purposes in product development and manufacture. The CC26xx device includes one I
2
C
module, providing the ability to interact (both transmit and receive) with other I
2
C devices on the bus.
The CC26xx device includes one I
2
C module with the following features:
• Devices on the I
2
C bus can be designated as either a master or a slave:
– Supports both transmitting and receiving data as either a master or a slave
– Supports simultaneous master and slave operation
• Four I
2
C modes:
– Master transmit
– Master receive
– Slave transmit
– Slave receive
• Two transmission speeds: standard (100 Kbps) and fast (400 Kbps)
• Master and slave interrupt generation:
– Master generates interrupts when a transmit or receive operation completes (or aborts due to an
error).
– Slave generates interrupts when data has been transferred or requested by a master or when a
Start or Stop condition is detected.
• Master with arbitration and clock synchronization, multimaster support, and 7-bit addressing mode
21.2 Block Diagram
Figure 21-1 shows the I
2
C block diagram.
Figure 21-1. I
2
C Block Diagram
21.3 Functional Description
The I
2
C module is comprised of both master and slave functions. For proper operation, the SDA pins must
be configured as open-drain signals. For proper operation, the SDA pin must be configured as an open-
drain signal. Figure 21-2 shows a typical I
2
C bus configuration.
1379
SWCU117A–February 2015–Revised March 2015
Inter-Integrated Circuit (I
2
C) Interface
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