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Cortex-M3 Processor Registers

2.7.4.5 STCVR Register (Offset = 18h) [reset = X]

STCVR is shown in Figure 2-75 and described in Table 2-101.

SysTick Current Value Read from this register returns the current value of SysTick counter. Writing to this

Figure 2-75. STCVR Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RESERVED CURRENT

R/W-X R/W-0h

Table 2-101. STCVR Register Field Descriptions

Bit Field Type Reset Description

31-24 RESERVED R/W X

Software should not rely on the value of a reserved. Writing any

other value than the reset value may result in undefined behavior.

23-0 CURRENT R/W 0h

Current value at the time the register is accessed. No read-modify-

write protection is provided, so change with care. Writing to it with

any value clears the register to 0. Clearing this register also clears

STCSR.COUNTFLAG.

135

SWCU117A–February 2015–Revised March 2015

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