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UARTS Registers

19.7.1.9 IFLS Register (Offset = 34h) [reset = X]

IFLS is shown in Figure 19-12 and described in Table 19-12.

Interrupt FIFO Level Select

Figure 19-12. IFLS Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RESERVED

R/W-X

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RESERVED RXSEL TXSEL

R/W-X R/W-2h R/W-2h

Table 19-12. IFLS Register Field Descriptions

Bit Field Type Reset Description

31-6 RESERVED R/W X

Software should not rely on the value of a reserved. Writing any

other value than the reset value may result in undefined behavior.

5-3 RXSEL R/W 2h

Receive interrupt FIFO level select: This field sets the trigger points

for the receive interrupt. Values 0b101-0b111 are reserved.

0h = 1_8 : Receive FIFO becomes >= 1/8 full

1h = 2_8 : Receive FIFO becomes >= 1/4 full

2h = 4_8 : Receive FIFO becomes >= 1/2 full

3h = 6_8 : Receive FIFO becomes >= 3/4 full

4h = 7_8 : Receive FIFO becomes >= 7/8 full

2-0 TXSEL R/W 2h

Transmit interrupt FIFO level select: This field sets the trigger points

for the transmit interrupt. Values 0b101-0b111 are reserved.

0h = 1_8 : Transmit FIFO becomes <= 1/8 full

1h = 2_8 : Transmit FIFO becomes <= 1/4 full

2h = 4_8 : Transmit FIFO becomes <= 1/2 full

3h = 6_8 : Transmit FIFO becomes <= 3/4 full

4h = 7_8 : Transmit FIFO becomes <= 7/8 full

1345

SWCU117A–February 2015–Revised March 2015 Universal Asynchronous Receivers and Transmitters (UARTS)

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