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17.8.3.2 VECCFG1 Register (Offset = 4h) [reset = X]
VECCFG1 is shown in Figure 17-21 and described in Table 17-41.
Vector Configuration 1 AUX_SCE event vectors 2 and 3 configuration
Figure 17-21. VECCFG1 Register
31 30 29 28 27 26 25 24
RESERVED
R-X
23 22 21 20 19 18 17 16
RESERVED
R-X
15 14 13 12 11 10 9 8
RESERVED VEC3_POL VEC3_EN VEC3_EV
R-X R/W-X R/W-X R/W-X
7 6 5 4 3 2 1 0
RESERVED VEC2_POL VEC2_EN VEC2_EV
R-X R/W-X R/W-X R/W-X
Table 17-41. VECCFG1 Register Field Descriptions
Bit Field Type Reset Description
31-15 RESERVED R X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
14 VEC3_POL R/W X
Selects vector 3 trigger event polarity. To manually trigger vector 3
execution, set VEC3_EV to a known static value, and toggle
VEC3_POL twice.
0h = Rising edge triggers execution.
1h = Falling edge triggers execution.
13 VEC3_EN R/W X
Enables (1) or disables (0) triggering of vector 3 execution. When
enabled, the edge selected by VEC3_POL on the event selected by
VEC3_EV will set VECFLAGS.VEC3, which in turn triggers vector 3
execution. Note: Lower vectors (0, 1 and 2) have priority.
0h = Event detection is disabled
1h = An event selected by VEC3_EV with polarity from VEC3_POL
triggers a jump to vector # 3 when AUX_SCE is in sleep
1239
SWCU117A–February 2015–Revised March 2015 AUX – Sensor Controller with Digital and Analog Peripherals
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