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AUX – Sensor Controller Registers

17.8.2.4 SATCFG Register (Offset = Ch) [reset = X]

SATCFG is shown in Figure 17-13 and described in Table 17-32.

Saturation Configuration

Figure 17-13. SATCFG Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RESERVED

R-X

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RESERVED LIMIT

R-X R/W-Fh

Table 17-32. SATCFG Register Field Descriptions

Bit Field Type Reset Description

31-4 RESERVED R X

Software should not rely on the value of a reserved. Writing any

other value than the reset value may result in undefined behavior.

3-0 LIMIT R/W Fh

Select when the TDC should time out. Values not enumerated is not

supported

3h = Result bit 13 : TDC saturates 2^13 ticks

4h = Result bit 14 : TDC saturates at 2^ 14 ticks

5h = Result bit 15 : TDC saturates at 2^ 15 ticks

6h = Result bit 16 : TDC saturates at 2^ 16 ticks

7h = Result bit 17 : TDC saturates at 2^ 17 ticks

8h = Result bit 18 : TDC saturates at 2^ 18 ticks

9h = Result bit 19 : TDC saturates at 2^ 19 ticks

Ah = Result bit 20 : TDC saturates at 2^20 ticks

Bh = Result bit 21 : TDC saturates at 2^21 ticks

Ch = Result bit 22 : TDC saturates at 2^22 ticks

Dh = Result bit 23 : TDC saturates at 2^23 ticks

Fh = Result bit 24 : TDC saturates at 2^24 ticks

1225

SWCU117A–February 2015–Revised March 2015 AUX – Sensor Controller with Digital and Analog Peripherals

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