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Random Number Generator

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16.7.1.17 HWVER0 Register (Offset = 7Ch) [reset = X]

HWVER0 is shown in Figure 16-20 and described in Table 16-22.

HW Version 0 EIP Number And Core Revision

Figure 16-20. HWVER0 Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RESERVED HW_MAJOR_VER HW_MINOR_VER HW_PATCH_LVL

R-X R-2h R-X R-X

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

EIP_NUM_COMPL EIP_NUM

R-B4h R-4Bh

Table 16-22. HWVER0 Register Field Descriptions

Bit Field Type Reset Description

31-28 RESERVED R X

Software should not rely on the value of a reserved. Writing any

other value than the reset value may result in undefined behavior.

27-24 HW_MAJOR_VER R 2h

4 bits binary encoding of the major hardware revision number.

23-20 HW_MINOR_VER R X

4 bits binary encoding of the minor hardware revision number.

19-16 HW_PATCH_LVL R X

4 bits binary encoding of the hardware patch level, initial release will

carry value zero.

15-8 EIP_NUM_COMPL R B4h

Bit-by-bit logic complement of bits [7:0]. This TRNG gives 0xB4.

7-0 EIP_NUM R 4Bh

8 bits binary encoding of the module number. This TRNG gives

0x4B.

1180

Random Number Generator SWCU117A–February 2015–Revised March 2015

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