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Cortex-M3 Processor Registers

2.7.3 CPU_FPB Registers

Table 2-85 lists the memory-mapped registers for the CPU_FPB. All register offset addresses not listed in

Table 2-85 should be considered as reserved locations and the register contents should not be modified.

Table 2-85. CPU_FPB Registers

Offset Acronym Register Name Section

0h CTRL Control Section 2.7.3.1

4h REMAP Remap Section 2.7.3.2

8h COMP0 Comparator 0 Section 2.7.3.3

Ch COMP1 Comparator 1 Section 2.7.3.4

10h COMP2 Comparator 2 Section 2.7.3.5

14h COMP3 Comparator 3 Section 2.7.3.6

18h COMP4 Comparator 4 Section 2.7.3.7

1Ch COMP5 Comparator 5 Section 2.7.3.8

20h COMP6 Comparator 6 Section 2.7.3.9

24h COMP7 Comparator 7 Section 2.7.3.10

117

SWCU117A–February 2015–Revised March 2015

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