User manual
www.ti.com
Random Number Generator
16.7.1.6 CTL Register (Offset = 14h) [reset = X]
CTL is shown in Figure 16-9 and described in Table 16-11.
Control
Figure 16-9. CTL Register
31 30 29 28 27 26 25 24
STARTUP_CYCLES
R/W-X
23 22 21 20 19 18 17 16
STARTUP_CYCLES
R/W-X
15 14 13 12 11 10 9 8
RESERVED TRNG_EN RESERVED
R-X R/W-X R-X
7 6 5 4 3 2 1 0
RESERVED NO_LFSR_FB TEST_MODE RESERVED
R-X R/W-X R/W-X R/W-X
Table 16-11. CTL Register Field Descriptions
Bit Field Type Reset Description
31-16 STARTUP_CYCLES R/W X
This field determines the number of samples (between 2 ^8 and
2^24) taken to gather entropy from the FROs during startup. If the
written value of this field is zero, the number of samples is 2^ 24,
otherwise the number of samples equals the written value times 2^8.
0x0000: 2^24 samples 0x0001: 1*2^8 samples 0x0002: 2*2^8
samples 0x0003: 3*2^8 samples ... 0x8000: 32768*2^8 samples
0xC000: 49152*2^8 samples ... 0xFFFF: 65535*2^8 samples This
field can only be modified while TRNG_EN is 0. If 1 an update will
be ignored.
15-11 RESERVED R X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
10 TRNG_EN R/W X
0: Forces all TRNG logic back into the idle state immediately. 1:
Starts TRNG, gathering entropy from the FROs for the number of
samples determined by STARTUP_CYCLES.
9-3 RESERVED R X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
2 NO_LFSR_FB R/W X
1: Remove XNOR feedback from the main LFSR, converting it into a
normal shift register for the XOR-ed outputs of the FROs (shifting
data in on the LSB side). A '1' also forces the LFSR to sample
continuously. This bit can only be set to '1' when TEST_MODE is
also set to '1' and should not be used for other than test purposes
1 TEST_MODE R/W X
1: Enables access to the TESTCNT and LFSR0/LFSR1/LFSR2
registers (the latter are automatically cleared before enabling
access) and keeps IRQFLAGSTAT.NEED_CLOCK at '1'. This bit
shall not be used unless you need to change the LFSR seed prior to
creating a new random value. All other testing is done external to
register control.
0 RESERVED R/W X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
1169
SWCU117A–February 2015–Revised March 2015 Random Number Generator
Submit Documentation Feedback
Copyright © 2015, Texas Instruments Incorporated