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Random Number Generator

16.7.1 TRNG Registers

Table 16-5 lists the memory-mapped registers for the TRNG. All register offset addresses not listed in

Table 16-5 should be considered as reserved locations and the register contents should not be modified.

Table 16-5. TRNG Registers

Offset Acronym Register Name Section

0h OUT0 Random Number Lower Word Readout Value Section 16.7.1.1

4h OUT1 Random Number Upper Word Readout Value Section 16.7.1.2

8h IRQFLAGSTAT Interrupt Status Section 16.7.1.3

Ch IRQFLAGMASK Interrupt Mask Section 16.7.1.4

10h IRQFLAGCLR Interrupt Flag Clear Section 16.7.1.5

14h CTL Control Section 16.7.1.6

18h CFG0 Configuration 0 Section 16.7.1.7

1Ch ALARMCNT Alarm Control Section 16.7.1.8

20h FROEN FRO Enable Section 16.7.1.9

24h FRODETUNE FRO De-tune Bit Section 16.7.1.10

28h ALARMMASK Alarm Event Section 16.7.1.11

2Ch ALARMSTOP Alarm Shutdown Section 16.7.1.12

30h LFSR0 LFSR Readout Value Section 16.7.1.13

34h LFSR1 LFSR Readout Value Section 16.7.1.14

38h LFSR2 LFSR Readout Value Section 16.7.1.15

78h HWOPT TRNG Engine Options Information Section 16.7.1.16

7Ch HWVER0 HW Version 0 Section 16.7.1.17

1FD8h IRQSTATMASK Interrupt Status After Masking Section 16.7.1.18

1FE0h HWVER1 HW Version 1 Section 16.7.1.19

1FECh IRQSET Interrupt Set Section 16.7.1.20

1FF0h SWRESET SW Reset Control Section 16.7.1.21

1FF8h IRQSTAT Interrupt Status Section 16.7.1.22

1163

SWCU117A–February 2015–Revised March 2015 Random Number Generator

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