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Watchdog Timer Registers

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15.4.1.1 LOAD Register (Offset = 0h) [reset = FFFFFFFFh]

LOAD is shown in Figure 15-2 and described in Table 15-2.

Configuration

Figure 15-2. LOAD Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

WDTLOAD

R/W-FFFFFFFFh

Table 15-2. LOAD Register Field Descriptions

Bit Field Type Reset Description

31-0 WDTLOAD R/W FFFFFFFFh

This register is the 32-bit interval value used by the 32-bit counter.

When this register is written, the value is immediately loaded and the

counter is restarted to count down from the new value. If this register

is loaded with 0x0000.0000, an interrupt is immediately generated.

1146

Watchdog Timer SWCU117A–February 2015–Revised March 2015

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