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Real-Time Clock Registers

14.4.1.12 SYNC Register (Offset = 2Ch) [reset = X]

SYNC is shown in Figure 14-13 and described in Table 14-13.

AON Synchronization This register is used for synchronizing between MCU and entire AON domain.

Figure 14-13. SYNC Register

31 30 29 28 27 26 25 24

RESERVED

R-X

23 22 21 20 19 18 17 16

RESERVED

R-X

15 14 13 12 11 10 9 8

RESERVED

R-X

7 6 5 4 3 2 1 0

RESERVED WBUSY

R-X R/W-X

Table 14-13. SYNC Register Field Descriptions

Bit Field Type Reset Description

31-1 RESERVED R X

Software should not rely on the value of a reserved. Writing any

other value than the reset value may result in undefined behavior.

0 WBUSY R/W X

This register will always return 0,- however it will not return the value

until there are no outstanding write requests between MCU and AON

Note: Writing to this register prior to reading will force a wait until

next SCLK_LF edge. This is recommended for syncing read

registers from AON when waking up from sleep Failure to do so may

result in reading AON values from prior to going to sleep

1141

SWCU117A–February 2015–Revised March 2015 Real-Time Clock

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