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Real-Time Clock Registers

14.4.1.4 SUBSEC Register (Offset = Ch) [reset = X]

SUBSEC is shown in Figure 14-5 and described in Table 14-5.

Second Counter Value, Fractional Part

Figure 14-5. SUBSEC Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

VALUE

R/W-X

Table 14-5. SUBSEC Register Field Descriptions

Bit Field Type Reset Description

31-0 VALUE R/W X

Unsigned integer representing Real Time Clock in fractions of a

second (VALUE/2^32 seconds) at the time when SEC register was

read. Examples : - 0x0000_0000 = 0.0 sec - 0x4000_0000 = 0.25

sec - 0x8000_0000 = 0.5 sec - 0xC000_0000 = 0.75 sec

1133

SWCU117A–February 2015–Revised March 2015 Real-Time Clock

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