User manual

Real-Time Clock Registers

www.ti.com

14.4.1.3 SEC Register (Offset = 8h) [reset = X]

SEC is shown in Figure 14-4 and described in Table 14-4.

Second Counter Value, Integer Part

Figure 14-4. SEC Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

VALUE

R/W-X

Table 14-4. SEC Register Field Descriptions

Bit Field Type Reset Description

31-0 VALUE R/W X

Unsigned integer representing Real Time Clock in seconds. When

reading this register the content of SUBSEC.VALUE is

simultaneously latched. A consistent reading of the combined Real

Time Clock can be obtained by first reading this register, then

reading SUBSEC register.

1132

Real-Time Clock SWCU117A–February 2015–Revised March 2015

Submit Documentation Feedback