User manual

Real-Time Clock Registers

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14.4.1 AON_RTC Registers

Table 14-1 lists the memory-mapped registers for the AON_RTC. All register offset addresses not listed in

Table 14-1 should be considered as reserved locations and the register contents should not be modified.

Table 14-1. AON_RTC Registers

Offset Acronym Register Name Section

0h CTL Control Section 14.4.1.1

4h EVFLAGS Event Flags - RTC Status Section 14.4.1.2

8h SEC Second Counter Value, Integer Part Section 14.4.1.3

Ch SUBSEC Second Counter Value, Fractional Part Section 14.4.1.4

10h SUBSECINC Subseconds Increment Section 14.4.1.5

14h CHCTL Channel Configuration Section 14.4.1.6

18h CH0CMP Channel 0 Compare Value Section 14.4.1.7

1Ch CH1CMP Channel 1 Compare Value Section 14.4.1.8

20h CH2CMP Channel 2 Compare Value Section 14.4.1.9

24h CH2CMPINC Channel 2 Compare Value Auto-increment Section 14.4.1.10

28h CH1CAPT Channel 1 Capture Value Section 14.4.1.11

2Ch SYNC AON Synchronization Section 14.4.1.12

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Real-Time Clock SWCU117A–February 2015–Revised March 2015

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