User manual

General-Purpose Timer Registers www.ti.com
13.5.1.27 DMAEV Register (Offset = 6Ch) [reset = X]
DMAEV is shown in Figure 13-35 and described in Table 13-34.
DMA Event This register allows software to enable/disable GPT DMA trigger events.
Figure 13-35. DMAEV Register
31 30 29 28 27 26 25 24
RESERVED
R-X
23 22 21 20 19 18 17 16
RESERVED
R-X
15 14 13 12 11 10 9 8
RESERVED TBMDMAEN CBEDMAEN CBMDMAEN TBTODMAEN
R-X R/W-X R/W-X R/W-X R/W-X
7 6 5 4 3 2 1 0
RESERVED TAMDMAEN RTCDMAEN CAEDMAEN CAMDMAEN TATODMAEN
R/W-X R/W-X R/W-X R/W-X R/W-X R/W-X
Table 13-34. DMAEV Register Field Descriptions
Bit Field Type Reset Description
31-12 RESERVED R X
Software should not rely on the value of a reserved field. Writing any
other value may result in undefined behavior.
11 TBMDMAEN R/W X
GPT Timer B Match DMA Trigger Enable
10 CBEDMAEN R/W X
GPT Timer B Capture Event DMA Trigger Enable
9 CBMDMAEN R/W X
GPT Timer B Capture Match DMA Trigger Enable
8 TBTODMAEN R/W X
GPT Timer B Time-Out DMA Trigger Enable
7-5 RESERVED R/W X
Software should not rely on the value of a reserved field. Writing any
other value may result in undefined behavior.
4 TAMDMAEN R/W X
GPT Timer A Match DMA Trigger Enable
3 RTCDMAEN R/W X
GPT RTC Match DMA Trigger Enable
2 CAEDMAEN R/W X
GPT Timer A Capture Event DMA Trigger Enable
1 CAMDMAEN R/W X
GPT Timer A Capture Match DMA Trigger Enable
0 TATODMAEN R/W X
GPT Timer A Time-Out DMA Trigger Enable
1120
Timers SWCU117A–February 2015–Revised March 2015
Submit Documentation Feedback
Copyright © 2015, Texas Instruments Incorporated