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General-Purpose Timer Registers

13.5.1.18 TAR Register (Offset = 48h) [reset = FFFFFFFFh]

TAR is shown in Figure 13-26 and described in Table 13-25.

Timer A Register

Figure 13-26. TAR Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

TAR

R-FFFFFFFFh

Table 13-25. TAR Register Field Descriptions

Bit Field Type Reset Description

31-0 TAR R FFFFFFFFh

GPT Timer A Register A read returns the current value of the Timer

A Count Register, in all cases except for Input Edge count and Timer

modes. In the Input Edge Count Mode, this register contains the

number of edges that have occurred. In the Input Edge Time mode,

this register contains the time at which the last edge event took

place.

1111

SWCU117A–February 2015–Revised March 2015 Timers

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