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13.5.1.8 MIS Register (Offset = 20h) [reset = X]
MIS is shown in Figure 13-16 and described in Table 13-15.
Masked Interrupt Status Values are result of bitwise AND operation between RIS and IMR Assosciated
clear register: ICLR
Figure 13-16. MIS Register
31 30 29 28 27 26 25 24
RESERVED
R-X
23 22 21 20 19 18 17 16
RESERVED WUMIS
R-X R-X
15 14 13 12 11 10 9 8
RESERVED DMABMIS RESERVED TBMMIS CBEMIS CBMMIS TBTOMIS
R-X R-X R-X R-X R-X R-X R-X
7 6 5 4 3 2 1 0
RESERVED DMAAMIS TAMMIS RTCMIS CAEMIS CAMMIS TATOMIS
R-X R-X R-X R-X R-X R-X R-X
Table 13-15. MIS Register Field Descriptions
Bit Field Type Reset Description
31-17 RESERVED R X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
16 WUMIS R X
0: No interrupt or interrupt not enabled 1: RIS.WURIS = 1 &&
IMR.WUMIS = 1
15-14 RESERVED R X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
13 DMABMIS R X
0: No interrupt or interrupt not enabled 1: RIS.DMABRIS = 1 &&
IMR.DMABIM = 1
12 RESERVED R X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
11 TBMMIS R X
0: No interrupt or interrupt not enabled 1: RIS.TBMRIS = 1 &&
IMR.TBMIM = 1
10 CBEMIS R X
0: No interrupt or interrupt not enabled 1: RIS.CBERIS = 1 &&
IMR.CBEIM = 1
9 CBMMIS R X
0: No interrupt or interrupt not enabled 1: RIS.CBMRIS = 1 &&
IMR.CBMIM = 1
8 TBTOMIS R X
0: No interrupt or interrupt not enabled 1: RIS.TBTORIS = 1 &&
IMR.TBTOIM = 1
7-6 RESERVED R X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
5 DMAAMIS R X
0: No interrupt or interrupt not enabled 1: RIS.DMAARIS = 1 &&
IMR.DMAAIM = 1
4 TAMMIS R X
0: No interrupt or interrupt not enabled 1: RIS.TAMRIS = 1 &&
IMR.TAMIM = 1
3 RTCMIS R X
0: No interrupt or interrupt not enabled 1: RIS.RTCRIS = 1 &&
IMR.RTCIM = 1
2 CAEMIS R X
0: No interrupt or interrupt not enabled 1: RIS.CAERIS = 1 &&
IMR.CAEIM = 1
1 CAMMIS R X
0: No interrupt or interrupt not enabled 1: RIS.CAMRIS = 1 &&
IMR.CAMIM = 1
1100
Timers SWCU117A–February 2015–Revised March 2015
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