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General-Purpose Timer Registers

Table 13-13. IMR Register Field Descriptions (continued)

Bit Field Type Reset Description

5 DMAAIM R/W X

Enabling this bit will make the RIS.DMAARIS interrupt propagate to

MIS.DMAAMIS

0h = Disable Interrupt

1h = Enable Interrupt

4 TAMIM R/W X

Enabling this bit will make the RIS.TAMRIS interrupt propagate to

MIS.TAMMIS

0h = Disable Interrupt

1h = Enable Interrupt

3 RTCIM R/W X

Enabling this bit will make the RIS.RTCRIS interrupt propagate to

MIS.RTCMIS

0h = Disable Interrupt

1h = Enable Interrupt

2 CAEIM R/W X

Enabling this bit will make the RIS.CAERIS interrupt propagate to

MIS.CAEMIS

0h = Disable Interrupt

1h = Enable Interrupt

1 CAMIM R/W X

Enabling this bit will make the RIS.CAMRIS interrupt propagate to

MIS.CAMMIS

0h = Disable Interrupt

1h = Enable Interrupt

0 TATOIM R/W X

Enabling this bit will make the RIS.TATORIS interrupt propagate to

MIS.TATOMIS

0h = Disable Interrupt

1h = Enable Interrupt

1097

SWCU117A–February 2015–Revised March 2015 Timers

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