User manual

General-Purpose Timer Registers

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13.5.1.1 CFG Register (Offset = 0h) [reset = X]

CFG is shown in Figure 13-9 and described in Table 13-8.

Configuration

Figure 13-9. CFG Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RESERVED CFG

R-X R/W-X

Table 13-8. CFG Register Field Descriptions

Bit Field Type Reset Description

31-3 RESERVED R X

Software should not rely on the value of a reserved. Writing any

other value than the reset value may result in undefined behavior.

2-0 CFG R/W X

GPT Configuration 0x2- 0x3 - Reserved 0x5- 0x7 - Reserved

0h = 32BIT_TIMER : 32-bit timer configuration

1h = 32-bit real-time clock

4h = 16BIT_TIMER : 16-bit timer configuration. Configure for two 16-

bit timers. Also see TAMR.TAMR and TBMR.TBMR.

1088

Timers SWCU117A–February 2015–Revised March 2015

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