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1081

GP Timer N

Timer B

Timer A

1 0 GPTMCFG

GP Timer N+1

Timer B

Timer A

1 0 GPTMCFG

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Functional Description

13.3.3 Wait-for-Trigger Mode

Wait-for-trigger mode allows daisy-chaining of the timer modules such that once configured, a single timer

can initiate multiple timing events using the timer triggers. Wait-for-trigger mode is enabled by setting the

TnWOT bit in the [GPT_TnMR] register. When the TnWOT bit is set, timer N+1 does not begin counting

until the timer in the previous position in the daisy-chain (timer N) reaches its time-out event. The daisy-

chain is configured such that GPTM1 always follows GPTM0, GPTM2 follows GPTM1, and so forth. If

timer A is configured as a 32-bit (16 or 32-bit mode) timer (controlled by the CFG field in the [GPT_CFG]

triggers timer B in the same module, and timer B triggers timer A in the next module. Ensure that the

TAWOT bit is never set in GPTM0. Figure 13-8 shows how the GPT_CFG.CFG bit affects the daisy-chain.

This function is valid for one-shot and periodic modes.

Figure 13-8. Timer Daisy-Chain

13.3.4 Synchronizing GP Timer Blocks

The GPTM Synchronizer Control [GPT_SYNC] register in the GPTM0 block can be used to synchronize

selected timers to begin counting at the same time. To do so, the timers must be started first. Setting a bit

in the [GPT_SYNC] register causes the associated timer to perform the actions of a time-out event. An

interrupt is not generated when the timers are synchronized. If a timer is being used in concatenated

mode, only the bit for timer A must be set in the [GPT_SYNC] register. The register description shows

which timers can be synchronized.

Table 13-6 shows the actions for the time-out event performed when the timers are synchronized in the

various timer modes.

Table 13-6. Time-out Actions for GPTM Modes

Mode Count Direction Time-out Action

16-bit and 32-bit one-shot (concatenated timers) ─ N/A

Down Count value = ILR

16- bit and 32-bit periodic (concatenated timers)

Up Count Value = 0

16-bit and 32- bit one-shot (individual and split timers) ─ N/A

Down Count value = ILR

16-bit and 32- bit periodic (individual and split timers)

Up Count value = 0

Down Count value = ILR

16-bit and 32-bit edge-count (individual and split timers)

Up Count Value = 0

Down Count value = ILR

16-bit and 32-bit edge-time (ndividual and split timers)

Up Count Value = 0

16-bit PWM Down Count value = ILR

1083

SWCU117A–February 2015–Revised March 2015 Timers

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