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µDMA Registers

12.5.1.10 CLEARREQMASK Register (Offset = 24h) [reset = X]

CLEARREQMASK is shown in Figure 12-16 and described in Table 12-17.

Clear Channel Request Mask

Figure 12-16. CLEARREQMASK Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

CHNLS

W-X

Table 12-17. CLEARREQMASK Register Field Descriptions

Bit Field Type Reset Description

31-0 CHNLS W X

Set the appropriate bit to enable DMA request for the channel. Write

as: Bit [Ch] = 0: No effect. Use the SETREQMASK.CHNLS to

disable channel C from generating requests. Bit [Ch] = 1: Enables

channel [C] to generate DMA requests. Writing to a bit where a DMA

channel is not implemented has no effect.

1063

SWCU117A–February 2015–Revised March 2015 Micro Direct Memory Access (µDMA)

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