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1041

SRC C

Task A

SRC

DST

Copied

SRC

DST

Copied

PRI

ALT

SRC

DST

Copied

SRC

DST

Copied

SRC

DST

Copied

SRC

DST

Copied

Task list

in memory

µDMA control table

in memory

Buffers

in memory

Task B

Task C

PRI

ALT

Using the primary control structure of the channel, the

µDMA controller copies task A configuration to the

alternate control structure of the channel.

Then, using the alternate control structure of the channel,

the µDMA controller copies data from source buffer A to

the peripheral data register.

Task list

in memory

µDMA control table

in memory

Buffers

in memory

Using the primary control structure of the channel, the

µDMA controller copies task B configuration to the

alternate control structure of the channel.

Then, using the alternate control structure of the channel,

the µDMA controller copies data from source buffer B to

the peripheral data register.

µDMA control table

in memory

Buffers

in memory

Using the primary control structure of the channel, the

µDMA controller copies task C configuration to the

alternate control structure of the channel.

Then, using the alternate control structure of the channel,

the µDMA controller copies data from source buffer C to

the peripheral data register.

PRI

ALT

Task list

in memory

Task A

Task B

Task A

Task C

Peripheral

data

SRC B

SRC C

Peripheral

data

SRC A

SRC C

Peripheral

data

SRC A

SRC B

Task B

Task C

SRC B

SRC A

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Functional Description

Figure 12-6. Peripheral Scatter-Gather, μDMA Copy Sequence

1049

SWCU117A–February 2015–Revised March 2015 Micro Direct Memory Access (µDMA)

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