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1041

SRC

DST

Copied

SRC

DST

Copied

PRI

ALT

SRC

DST

Copied

SRC

DST

Copied

SRC

DST

Copied

SRC

DST

Copied

Task list

in memory

µDMA control table

in memory

Buffers

in memory

Task B

Task C

PRI

ALT

SRC B

SRC C

DEST B

DEST C

Using the primary control structure of the channel, the

µDMA controller copies task A configuration to the

alternate control structure of the channel.

Then, using the alternate control structure of the channel,

the µDMA controller copies data from source buffer A to

the destination buffer.

Task list

in memory

µDMA control table

in memory

Buffers

in memory

Using the primary control structure of the channel, the

µDMA controller copies task B configuration to the

alternate control structure of the channel.

Then, using the alternate control structure of the channel,

the µDMA controller copies data from source buffer B to

the destination buffer.

µDMA control table

in memory

Buffers

in memory

Using the primary control structure of the channel, the

µDMA controller copies task C configuration to the

alternate control structure of the channel.

Then, using the alternate control structure of the channel,

the µDMA controller copies data from source buffer C to

destination buffer.

PRI

ALT

Task list

in memory

Task A

Task B

Task A

Task C

SRC A

SRC C

DEST A

DEST C

SRC A

SRC B

DEST A

DEST B

Task A

Task B

SRC A

Task C

SRC C

DEST C

SRC B

DEST B

DEST A

Functional Description

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Figure 12-4. Memory Scatter-Gather, μDMA Copy Sequence

1046

Micro Direct Memory Access (µDMA) SWCU117A–February 2015–Revised March 2015

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