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11.11.3.13 DIN31_0 Register (Offset = C0h) [reset = X]
DIN31_0 is shown in Figure 11-52 and described in Table 11-56.
Data Input from DIO 0 to 31
Figure 11-52. DIN31_0 Register
31 30 29 28 27 26 25 24
DIO31 DIO30 DIO29 DIO28 DIO27 DIO26 DIO25 DIO24
R-X R-X R-X R-X R-X R-X R-X R-X
23 22 21 20 19 18 17 16
DIO23 DIO22 DIO21 DIO20 DIO19 DIO18 DIO17 DIO16
R-X R-X R-X R-X R-X R-X R-X R-X
15 14 13 12 11 10 9 8
DIO15 DIO14 DIO13 DIO12 DIO11 DIO10 DIO9 DIO8
R-X R-X R-X R-X R-X R-X R-X R-X
7 6 5 4 3 2 1 0
DIO7 DIO6 DIO5 DIO4 DIO3 DIO2 DIO1 DIO0
R-X R-X R-X R-X R-X R-X R-X R-X
Table 11-56. DIN31_0 Register Field Descriptions
Bit Field Type Reset Description
31 DIO31 R X
Data input from DIO 31
30 DIO30 R X
Data input from DIO 30
29 DIO29 R X
Data input from DIO 29
28 DIO28 R X
Data input from DIO 28
27 DIO27 R X
Data input from DIO 27
26 DIO26 R X
Data input from DIO 26
25 DIO25 R X
Data input from DIO 25
24 DIO24 R X
Data input from DIO 24
23 DIO23 R X
Data input from DIO 23
22 DIO22 R X
Data input from DIO 22
21 DIO21 R X
Data input from DIO 21
20 DIO20 R X
Data input from DIO 20
19 DIO19 R X
Data input from DIO 19
18 DIO18 R X
Data input from DIO 18
17 DIO17 R X
Data input from DIO 17
16 DIO16 R X
Data input from DIO 16
15 DIO15 R X
Data input from DIO 15
14 DIO14 R X
Data input from DIO 14
13 DIO13 R X
Data input from DIO 13
12 DIO12 R X
Data input from DIO 12
11 DIO11 R X
Data input from DIO 11
10 DIO10 R X
Data input from DIO 10
9 DIO9 R X
Data input from DIO 9
8 DIO8 R X
Data input from DIO 8
7 DIO7 R X
Data input from DIO 7
1029
SWCU117A–February 2015–Revised March 2015 I/O Control
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