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11.11.3.4 DOUT15_12 Register (Offset = Ch) [reset = X]
DOUT15_12 is shown in Figure 11-43 and described in Table 11-47.
Data Out 12 to 15 Alias register for byte access to each bit in DOUT31_0
Figure 11-43. DOUT15_12 Register
31 30 29 28 27 26 25 24
RESERVED DIO15
R-X W-X
23 22 21 20 19 18 17 16
RESERVED DIO14
R-X W-X
15 14 13 12 11 10 9 8
RESERVED DIO13
R-X W-X
7 6 5 4 3 2 1 0
RESERVED DIO12
R-X W-X
Table 11-47. DOUT15_12 Register Field Descriptions
Bit Field Type Reset Description
31-25 RESERVED R X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
24 DIO15 W X
Sets the state of the pin that is configured as DIO#15, if the
corresponding DOE31_0 bitfield is set.
23-17 RESERVED R X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
16 DIO14 W X
Sets the state of the pin that is configured as DIO#14, if the
corresponding DOE31_0 bitfield is set.
15-9 RESERVED R X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
8 DIO13 W X
Sets the state of the pin that is configured as DIO#13, if the
corresponding DOE31_0 bitfield is set.
7-1 RESERVED R X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
0 DIO12 W X
Sets the state of the pin that is configured as DIO#12, if the
corresponding DOE31_0 bitfield is set.
1016
I/O Control SWCU117A–February 2015–Revised March 2015
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