User manual

F-1
Appendix A
Glossary
A
A0–A15: Collectively, the external address bus; the 16 pins are used in par-
allel to address external data memory, program memory, or I/O space.
ACC:
See accumulator.
ACCH: Accumulator high word. The upper 16 bits of the accumulator. See
also
accumulator .
ACCL:
Accumulator low word. The lower 16 bits of the accumulator. See
also
accumulator .
accumulator: A 32-bit register that stores the results of operations in the
central arithmetic logic unit (CALU) and provides an input for subsequent
CALU operations. The accumulator also performs shift and rotate opera-
tions.
ADC bit: A
detect complete bit . Bit 14 of the I/O status register (IOSR); a flag
bit used in the implementation of automatic baud-rate detection in the
asynchronous serial port.
address: The location of program code or data stored in memory.
addressing mode: A method by which an instruction interprets its operands
to acquire the data it needs. See also
direct addressing ; immediate ad-
dressing
; indirect addressing .
address visibility bit (AVIS): A bit in the ’C209’s wait-state generator con-
trol register (WSGR) that allows the internal program address to appear
at the ’C209 address pins. This allows the internal program address to
be traced.
ADTR:
Asynchronous data transmit and receive register. A 16-bit register
used by the on-chip asynchronous serial port. Data to transmit is written
to the 8 LSBs of the ADTR, and received data is read from the 8 LSBs
of the ADTR. See also
ARSR.
Appendix F