User manual
Table Of Contents
- Read This First
- Contents
- Figures
- Tables
- Examples
- Cautions
- Introduction
- Architectural Overview
- Central Processing Unit
- Memory and I/O Spaces
- Program Control
- Addressing Modes
- Assembly Language Instructions
- Instruction Set Summary
- How To Use the Instruction Descriptions
- Instruction Descriptions
- ABS
- ABS
- ADD
- ADD
- ADD
- ADD
- ADDC
- ADDC
- ADDS
- ADDS
- ADDT
- ADDT
- ADRK
- AND
- AND
- AND
- APAC
- APAC
- B
- BACC
- BANZ
- BANZ
- BCND
- BCND
- BIT
- BIT
- BITT
- BITT
- BLDD
- BLDD
- BLDD
- BLDD
- BLDD
- BLPD
- BLPD
- BLPD
- BLPD
- CALA
- CALL
- CC
- CC
- CLRC
- CLRC
- CMPL
- CMPR
- DMOV
- DMOV
- IDLE
- IN
- IN
- INTR
- LACC
- LACC
- LACC
- LACL
- LACL
- LACL
- LACT
- LACT
- LAR
- LAR
- LAR
- LDP
- LDP
- LPH
- LPH
- LST
- LST
- LST
- LST
- LT
- LT
- LTA
- LTA
- LTD
- LTD
- LTD
- LTP
- LTP
- LTS
- LTS
- MAC
- MAC
- MAC
- MAC
- MACD
- MACD
- MACD
- MACD
- MACD
- MAR
- MAR
- MPY
- MPY
- MPY
- MPYA
- MPYA
- MPYS
- MPYS
- MPYU
- MPYU
- NEG
- NEG
- NMI
- NOP
- NORM
- NORM
- NORM
- OR
- OR
- OR
- OUT
- OUT
- PAC
- POP
- POP
- POPD
- POPD
- PSHD
- PSHD
- PUSH
- RET
- RETC
- ROL
- ROR
- RPT
- RPT
- SACH
- SACH
- SACL
- SACL
- SAR
- SAR
- SBRK
- SETC
- SETC
- SFL
- SFR
- SFR
- SPAC
- SPH
- SPH
- SPL
- SPL
- SPLK
- SPLK
- SPM
- SQRA
- SQRA
- SQRS
- SQRS
- SST
- SST
- SUB
- SUB
- SUB
- SUB
- SUBB
- SUBB
- SUBC
- SUBC
- SUBS
- SUBS
- SUBT
- SUBT
- TBLR
- TBLR
- TBLR
- TBLW
- TBLW
- TBLW
- TRAP
- XOR
- XOR
- XOR
- ZALR
- ZALR
- On-Chip Peripherals
- Synchronous Serial Port
- Asynchronous Serial Port
- TMS320C209
- Register Summary
- TMS320C1x/C2x/C2xx/C5x Instruction Set Comparison
- Program Examples
- Submitting ROM Codes to TI
- Design Considerations for Using XDS510 Emulator
- E.1 Designing Your Target System’s Emulator Connector (14-Pin Header)
- E.2 Bus Protocol
- E.3 Emulator Cable Pod
- E.4 Emulator Cable Pod Signal Timing
- E.5 Emulation Timing Calculations
- E.6 Connections Between the Emulator and the Target System
- E.7 Physical Dimensions for the 14-Pin Emulator Connector
- E.8 Emulation Design Considerations
- Glossary
- Index

Instruction Set Comparison Table
B-24
Syntax
Description5x2xx2x1x
MPYA
dma
MPYA {
ind
} [
, next ARP
]
√
√
√
√
√
√
Multiply and Accumulate Previous Product
Multiply the contents of the T register (TMS320C2x/
2xx) or TREG0 (TMS320C5x) by the contents of the
addressed data-memory location; place the result in
the P register. Add the previous product (shifted as
specified by the PM status bits) to the accumulator.
MPYK
13-bit constant
√ √ √ √
Multiply Immediate
Multiply the contents of the T register (TMS320C2x/
2xx) or TREG0 (TMS320C5x) by a signed 13-bit
constant; place the result in the P register.
MPYS
dma
MPYS {
ind
} [
, next ARP
]
√
√
√
√
√
√
Multiply and Subtract Previous Product
Multiply the contents of the T register (TMS320C2x/
2xx) or TREG0 (TMS320C5x) by the contents of the
addressed data-memory location; place the result in
the P register. Subtract the previous product (shifted
as specified by the PM status bits) from the accumula-
tor.
MPYU
dma
MPYU {
ind
} [
, next ARP
]
√
√
√
√
√
√
Multiply Unsigned
Multiply the unsigned contents of the T register
(TMS320C2x/2xx) or TREG0 (TMS320C5x) by the
unsigned contents of the addressed data-memory lo-
cation; place the result in the P register.
NEG
√ √ √
Negate Accumulator
Negate (2s complement) the contents of the accumu-
lator.
NMI
√ √
Nonmaskable Interrupt
Force the program counter to the nonmaskable inter-
rupt vector location 24h. NMI has the same effect as a
hardware nonmaskable interrupt.
NOP
√ √ √ √
No Operation
Perform no operation.
NORM
NORM {
ind
}
√
√
√
√
√
√
Normalize Contents of Accumulator
Normalize a signed number in the accumulator.
OPL [#
lk
,]
dma
OPL [#
lk
,] {
ind
} [
, next ARP
]
√
√
OR With DBMR or Long Immediate
If a long immediate is specified, OR it with the value at
the specified data-memory location; otherwise, the
second operand of the OR operation is the contents of
the DBMR. The result is written back into the data-
memory location previously holding the first operand.