User manual
Table Of Contents
- Read This First
- Contents
- Figures
- Tables
- Examples
- Cautions
- Introduction
- Architectural Overview
- Central Processing Unit
- Memory and I/O Spaces
- Program Control
- Addressing Modes
- Assembly Language Instructions
- Instruction Set Summary
- How To Use the Instruction Descriptions
- Instruction Descriptions
- ABS
- ABS
- ADD
- ADD
- ADD
- ADD
- ADDC
- ADDC
- ADDS
- ADDS
- ADDT
- ADDT
- ADRK
- AND
- AND
- AND
- APAC
- APAC
- B
- BACC
- BANZ
- BANZ
- BCND
- BCND
- BIT
- BIT
- BITT
- BITT
- BLDD
- BLDD
- BLDD
- BLDD
- BLDD
- BLPD
- BLPD
- BLPD
- BLPD
- CALA
- CALL
- CC
- CC
- CLRC
- CLRC
- CMPL
- CMPR
- DMOV
- DMOV
- IDLE
- IN
- IN
- INTR
- LACC
- LACC
- LACC
- LACL
- LACL
- LACL
- LACT
- LACT
- LAR
- LAR
- LAR
- LDP
- LDP
- LPH
- LPH
- LST
- LST
- LST
- LST
- LT
- LT
- LTA
- LTA
- LTD
- LTD
- LTD
- LTP
- LTP
- LTS
- LTS
- MAC
- MAC
- MAC
- MAC
- MACD
- MACD
- MACD
- MACD
- MACD
- MAR
- MAR
- MPY
- MPY
- MPY
- MPYA
- MPYA
- MPYS
- MPYS
- MPYU
- MPYU
- NEG
- NEG
- NMI
- NOP
- NORM
- NORM
- NORM
- OR
- OR
- OR
- OUT
- OUT
- PAC
- POP
- POP
- POPD
- POPD
- PSHD
- PSHD
- PUSH
- RET
- RETC
- ROL
- ROR
- RPT
- RPT
- SACH
- SACH
- SACL
- SACL
- SAR
- SAR
- SBRK
- SETC
- SETC
- SFL
- SFR
- SFR
- SPAC
- SPH
- SPH
- SPL
- SPL
- SPLK
- SPLK
- SPM
- SQRA
- SQRA
- SQRS
- SQRS
- SST
- SST
- SUB
- SUB
- SUB
- SUB
- SUBB
- SUBB
- SUBC
- SUBC
- SUBS
- SUBS
- SUBT
- SUBT
- TBLR
- TBLR
- TBLR
- TBLW
- TBLW
- TBLW
- TRAP
- XOR
- XOR
- XOR
- ZALR
- ZALR
- On-Chip Peripherals
- Synchronous Serial Port
- Asynchronous Serial Port
- TMS320C209
- Register Summary
- TMS320C1x/C2x/C2xx/C5x Instruction Set Comparison
- Program Examples
- Submitting ROM Codes to TI
- Design Considerations for Using XDS510 Emulator
- E.1 Designing Your Target System’s Emulator Connector (14-Pin Header)
- E.2 Bus Protocol
- E.3 Emulator Cable Pod
- E.4 Emulator Cable Pod Signal Timing
- E.5 Emulation Timing Calculations
- E.6 Connections Between the Emulator and the Target System
- E.7 Physical Dimensions for the 14-Pin Emulator Connector
- E.8 Emulation Design Considerations
- Glossary
- Index

Instruction Set Comparison Table
B-20
Syntax
Description5x2xx2x1x
LACT
dma
LACT {
ind
} [
, next ARP
]
√
√
√
√
√
√
Load Accumulator With Shift Specified by T
Register
Left shift the contents of the addressed data-memory
location by the value specified in the 4 LSBs of the T
register; load the result into the accumulator. If a shift
is specified, left shift the value before loading it into the
accumulator. During shifting, low-order bits are zero
filled, and high-order bits are sign extended if SXM = 1.
LALK #
lk
[
, shift
]
√ √ √
Load Accumulator Long Immediate With Shift
Load a 16-bit immediate value into the accumulator. If
a shift is specified, left shift the constant before loading
it into the accumulator. During shifting, low-order bits
are zero filled, and high-order bits are sign extended if
SXM = 1.
LAMM
dma
LAMM {
ind
} [
, next ARP
]
√
√
Load Accumulator With Memory-Mapped
Register
Load the contents of the addressed memory-mapped
register into the low word of the accumulator. The 9
MSBs of the data-memory address are cleared,
regardless of the current value of DP or the 9 MSBs of
AR (ARP).
LAR
AR, dma
LAR
AR,
{
ind
} [
, next ARP
]
LAR
AR,
#
k
LAR
AR,
#
lk
√
√
√
√
√
√
√
√
√
√
√
√
Load Auxiliary Register
TMS320C1x and TMS320C2x devices: Load the con-
tents of the addressed data-memory location into the
designated auxiliary register.
TMS320C25, TMS320C2xx, and TMS320C5x de-
vices: Load the contents of the addressed data-
memory location or an 8-bit or 16-bit immediate value
into the designated auxiliary register.
LARK
AR, 8-bit constant
√ √ √ √
Load Auxiliary Register Immediate Short
Load an 8-bit positive constant into the designated
auxiliary register.
LARP
1-bit constant
LARP
3-bit constant
√
√ √ √
Load Auxiliary Register Pointer
TMS320C1x devices: Load a 1-bit constant into the
auxiliary register pointer (specifying AR0 or AR1).
TMS320C2x, TMS320C2xx, and TMS320C5x de-
vices: Load a 3-bit constant into the auxiliary register
pointer (specifying AR0–AR7).