User manual
Table Of Contents
- Read This First
- Contents
- Figures
- Tables
- Examples
- Cautions
- Introduction
- Architectural Overview
- Central Processing Unit
- Memory and I/O Spaces
- Program Control
- Addressing Modes
- Assembly Language Instructions
- Instruction Set Summary
- How To Use the Instruction Descriptions
- Instruction Descriptions
- ABS
- ABS
- ADD
- ADD
- ADD
- ADD
- ADDC
- ADDC
- ADDS
- ADDS
- ADDT
- ADDT
- ADRK
- AND
- AND
- AND
- APAC
- APAC
- B
- BACC
- BANZ
- BANZ
- BCND
- BCND
- BIT
- BIT
- BITT
- BITT
- BLDD
- BLDD
- BLDD
- BLDD
- BLDD
- BLPD
- BLPD
- BLPD
- BLPD
- CALA
- CALL
- CC
- CC
- CLRC
- CLRC
- CMPL
- CMPR
- DMOV
- DMOV
- IDLE
- IN
- IN
- INTR
- LACC
- LACC
- LACC
- LACL
- LACL
- LACL
- LACT
- LACT
- LAR
- LAR
- LAR
- LDP
- LDP
- LPH
- LPH
- LST
- LST
- LST
- LST
- LT
- LT
- LTA
- LTA
- LTD
- LTD
- LTD
- LTP
- LTP
- LTS
- LTS
- MAC
- MAC
- MAC
- MAC
- MACD
- MACD
- MACD
- MACD
- MACD
- MAR
- MAR
- MPY
- MPY
- MPY
- MPYA
- MPYA
- MPYS
- MPYS
- MPYU
- MPYU
- NEG
- NEG
- NMI
- NOP
- NORM
- NORM
- NORM
- OR
- OR
- OR
- OUT
- OUT
- PAC
- POP
- POP
- POPD
- POPD
- PSHD
- PSHD
- PUSH
- RET
- RETC
- ROL
- ROR
- RPT
- RPT
- SACH
- SACH
- SACL
- SACL
- SAR
- SAR
- SBRK
- SETC
- SETC
- SFL
- SFR
- SFR
- SPAC
- SPH
- SPH
- SPL
- SPL
- SPLK
- SPLK
- SPM
- SQRA
- SQRA
- SQRS
- SQRS
- SST
- SST
- SUB
- SUB
- SUB
- SUB
- SUBB
- SUBB
- SUBC
- SUBC
- SUBS
- SUBS
- SUBT
- SUBT
- TBLR
- TBLR
- TBLR
- TBLW
- TBLW
- TBLW
- TRAP
- XOR
- XOR
- XOR
- ZALR
- ZALR
- On-Chip Peripherals
- Synchronous Serial Port
- Asynchronous Serial Port
- TMS320C209
- Register Summary
- TMS320C1x/C2x/C2xx/C5x Instruction Set Comparison
- Program Examples
- Submitting ROM Codes to TI
- Design Considerations for Using XDS510 Emulator
- E.1 Designing Your Target System’s Emulator Connector (14-Pin Header)
- E.2 Bus Protocol
- E.3 Emulator Cable Pod
- E.4 Emulator Cable Pod Signal Timing
- E.5 Emulation Timing Calculations
- E.6 Connections Between the Emulator and the Target System
- E.7 Physical Dimensions for the 14-Pin Emulator Connector
- E.8 Emulation Design Considerations
- Glossary
- Index

Instruction Set Comparison Table
B-15
TMS320C1x/C2x/C2xx/C5x Instruction Set Comparison
Syntax
Description5x2xx2x1x
BZ
pma
BZ
pma
[
,
{
ind
} [
, next ARP
]]
√
√
√ √
Branch if Accumulator = Zero
If the contents of the accumulator = 0, branch to the
specified program-memory address.
TMS320C2x, TMS320C2xx and TMS320C5x de-
vices: Modify the current AR and ARP as specified.
TMS320C2xx and TMS320C5x devices: To modify the
AR and ARP, use the –p porting switch.
CALA
√ √ √
Call Subroutine Indirect
The contents of the accumulator specify the address
of a subroutine. Increment the PC, push the PC onto
the stack, then load the 12 (TMS320C1x) or 16
(TMS320C2x/C2xx) LSBs of the accumulator into the
PC.
CALA[
D
]
√
Call Subroutine Indirect With Optional Delay
The contents of the accumulator specify the address
of a subroutine. Increment the PC and push it onto the
stack; then load the 16 LSBs of the accumulator into
the PC.
If you specify a delayed branch (CALAD), the next two
instruction words (two 1-word instructions or one
2-word instruction) are fetched and executed before
the call.
CALL
pma
CALL
pma
[
,
{
ind
} [
, next ARP
]]
√
√ √
Call Subroutine
The contents of the addressed program-memory loca-
tion specify the address of a subroutine. Increment the
PC by 2, push the PC onto the stack, then load the
specified program-memory address into the PC.
TMS320C2x and TMS320C2xx devices: Modify the
current AR and ARP as specified.
CALL[
D
]
pma
[
,
{
ind
} [
, next
ARP
]]
√
Call Unconditionally With Optional Delay
The contents of the addressed program-memory loca-
tion specify the address of a subroutine. Increment the
PC and push the PC onto the stack; then load the
specified program-memory address (symbolic or nu-
meric) into the PC. Modify the current AR and ARP as
specified.
If you specify a delayed branch (CALLD), the next two
instruction words (two 1-word instructions or one
2-word instruction) are fetched and executed before
the call.