User manual
Table Of Contents
- Read This First
- Contents
- Figures
- Tables
- Examples
- Cautions
- Introduction
- Architectural Overview
- Central Processing Unit
- Memory and I/O Spaces
- Program Control
- Addressing Modes
- Assembly Language Instructions
- Instruction Set Summary
- How To Use the Instruction Descriptions
- Instruction Descriptions
- ABS
- ABS
- ADD
- ADD
- ADD
- ADD
- ADDC
- ADDC
- ADDS
- ADDS
- ADDT
- ADDT
- ADRK
- AND
- AND
- AND
- APAC
- APAC
- B
- BACC
- BANZ
- BANZ
- BCND
- BCND
- BIT
- BIT
- BITT
- BITT
- BLDD
- BLDD
- BLDD
- BLDD
- BLDD
- BLPD
- BLPD
- BLPD
- BLPD
- CALA
- CALL
- CC
- CC
- CLRC
- CLRC
- CMPL
- CMPR
- DMOV
- DMOV
- IDLE
- IN
- IN
- INTR
- LACC
- LACC
- LACC
- LACL
- LACL
- LACL
- LACT
- LACT
- LAR
- LAR
- LAR
- LDP
- LDP
- LPH
- LPH
- LST
- LST
- LST
- LST
- LT
- LT
- LTA
- LTA
- LTD
- LTD
- LTD
- LTP
- LTP
- LTS
- LTS
- MAC
- MAC
- MAC
- MAC
- MACD
- MACD
- MACD
- MACD
- MACD
- MAR
- MAR
- MPY
- MPY
- MPY
- MPYA
- MPYA
- MPYS
- MPYS
- MPYU
- MPYU
- NEG
- NEG
- NMI
- NOP
- NORM
- NORM
- NORM
- OR
- OR
- OR
- OUT
- OUT
- PAC
- POP
- POP
- POPD
- POPD
- PSHD
- PSHD
- PUSH
- RET
- RETC
- ROL
- ROR
- RPT
- RPT
- SACH
- SACH
- SACL
- SACL
- SAR
- SAR
- SBRK
- SETC
- SETC
- SFL
- SFR
- SFR
- SPAC
- SPH
- SPH
- SPL
- SPL
- SPLK
- SPLK
- SPM
- SQRA
- SQRA
- SQRS
- SQRS
- SST
- SST
- SUB
- SUB
- SUB
- SUB
- SUBB
- SUBB
- SUBC
- SUBC
- SUBS
- SUBS
- SUBT
- SUBT
- TBLR
- TBLR
- TBLR
- TBLW
- TBLW
- TBLW
- TRAP
- XOR
- XOR
- XOR
- ZALR
- ZALR
- On-Chip Peripherals
- Synchronous Serial Port
- Asynchronous Serial Port
- TMS320C209
- Register Summary
- TMS320C1x/C2x/C2xx/C5x Instruction Set Comparison
- Program Examples
- Submitting ROM Codes to TI
- Design Considerations for Using XDS510 Emulator
- E.1 Designing Your Target System’s Emulator Connector (14-Pin Header)
- E.2 Bus Protocol
- E.3 Emulator Cable Pod
- E.4 Emulator Cable Pod Signal Timing
- E.5 Emulation Timing Calculations
- E.6 Connections Between the Emulator and the Target System
- E.7 Physical Dimensions for the 14-Pin Emulator Connector
- E.8 Emulation Design Considerations
- Glossary
- Index

Multiply and Accumulate With Data Move
MACD
7-107
Assembly Language Instructions
Status Bits
Affected by Affects
PM and OVM C and OV
Description The MACD instruction:
Adds the previous product, shifted as defined by the PM status bits, to the
accumulator. The carry bit is set (C = 1) if the result of the addition gener-
ates a carry and is cleared (C = 0) if it does not generate a carry.
Loads the TREG with the content of the specified data-memory address.
Multiplies the data-memory value in the TREG by the contents of the spe-
cified program-memory address.
Copies the contents of the specified data-memory address to the next
higher data-memory address.
The data- and program-memory locations on the ’C2xx may be any nonre-
served, on-chip or off-chip memory locations. If the program memory is block
B0 of on-chip RAM, the CNF bit must be set to 1. If MACD addresses one of
the memory-mapped registers or external memory as a data-memory location,
the effect of the instruction is that of a MAC instruction; the data move will not
occur (see the DMOV instruction description).
When the MACD instruction is repeated, the program-memory address con-
tained in the PC is incremented by 1 during each repetition. This makes it pos-
sible to access a series of operands in program memory. If you use indirect
addressing to specify the data-memory address, a new data-memory address
can be accessed during each repetition. If you use the direct addressing mode,
the specified data-memory address is a constant; it will not be modified during
each repetition.
MACD functions in the same manner as MAC, with the addition of a data move
for on-chip RAM blocks. This feature makes MACD useful for applications
such as convolution and transversal filtering. When used with RPT, MACD be-
comes a single-cycle instruction once the RPT pipeline is started.
Words 2
Cycles
Cycles for a Single MACD Instruction
Operand
ROM DARAM SARAM External
Operand 1: DARAM/
ROM
Operand 2: DARAM
3 3 3 3+2p
code
Operand 1: SARAM
Operand 2: DARAM
3 3 3 3+2p
code