Datasheet

V =V ´
OUT S
CODE
1024
Ackn
Ackn
Ackn
Ackn
D0
D1D2
D3
D4
D5D6
D7
D8D9D10
D11D12
D13
D14
D15
R0
R1R2
R3
R4
D5D6
D7
W
A0
A1A2
A3
A4
A5A6
Ackn
Ackn
Ackn
Ackn
D0
D1D2
D3
D4
D5D6
D7
D8D9D10
D11D12
D13
D14
D15
R0
R1R2
R3
R4
D5D6
D7
W
A0
A1A2
A3
A4
A5A6
Start
WritesingleDACregister.R4-R0specifyDACaddress.
WriteOperation
Write
Ackn
Ackn
Ackn
Ackn
Stop
DACLSbyte
DACMSbyte.D14mustbe0.
DACaddresspointer.D7-D5mustbe000.
DeviceAddress
SCL
SDA_In
Device_Out
TheentireDACregisterD9-D0
isupdatedatthismoment.
D15=1,allDACoutputsareupdatedwhenthecurrentDACregisterisupdated.
10 sm
DAC_OUTPUT
BUF12840
www.ti.com SBOS519A –OCTOBER 2010– REVISED JULY 2011
DAC VOLTAGE OUTPUT CODE
Buffer output values are determined by the analog
supply voltage (V
S
) and the decimal value of the
binary input code used to program that buffer. The
value is calculated using Equation 1:
Where:
CODE can vary from 0 to 1023. (1)
The BUF12840 outputs are capable of a full-scale
voltage output change in typically 5μs, see Figure 9;
no intermediate steps are required. The outputs are
also capable of a full-scale output change using the
BKSEL or LD pin in typically 7µs, see Figure 8.
SOFTWARE DAC OUTPUT UPDATE
Because the BUF12840 features a double-buffered
register structure, updating the digital-to-analog
converter (DAC) register is not the same as updating
the DAC output voltage. There are two methods for
updating the DAC output voltages.
Method 1: Method 1 is used when it is desirable to
have the DAC output voltage change immediately
after writing to a DAC register. For each write
transaction, the master sets data bit 15 to a '1'. The
DAC output voltage update occurs after receiving the
16th data bit for the currently-written register, as
shown in Figure 11.
Method 2: Method 2 is used when it is desirable to
have all DAC output voltages change at the same
time. First, the master writes to the desired DAC
channels with data bit 15 a '0'. Then, when writing the
last desired DAC channel, the master sets data bit 15
to a '1'. All DAC channels are updated at the same
time after receiving the 16th data bit.
Figure 11. Write DAC_OUT Register Timing
Copyright © 2010–2011, Texas Instruments Incorporated 9