Datasheet

EEPROMTCON
0.1mF
V
SD
SDA
SCL
GNDD
V
S
BKSEL
A0
SCL
SDA
PowerPAD GND
D
GND
A
V
SD
SDA
SCL
GNDD
A1
A0
0.1mF
0.1mF
V
SD
LD
EN
EA0
EA1
1mF
V
S
V
SD
BUF12840
SourceDrivers
OUT11
OUT10
OUT9
OUT8
OUT7
OUT6
OUT5
OUT4
OUT3
OUT2
OUT1
OUT0
I/O
I/O
10kW 10kW
BUF12840
SBOS519A –OCTOBER 2010– REVISED JULY 2011 www.ti.com
Figure 10. Typical Application Configuration
code. Table 2 provides a reference for the
High-speed mode command code. (Note that this
DATA RATES
configuration is different from normal address
The two-wire bus operates in one of three speed
bytes—the low bit does not indicate read/write
modes:
status.) The BUF12840 responds to the High-speed
• Standard: allows a clock frequency of up to
command regardless of the value of these last three
100kHz;
bits. The BUF12840 does not acknowledge this byte;
the communication protocol prohibits
• Fast: allows a clock frequency of up to 400kHz;
acknowledgment of the Hs master code. Upon
and
receiving a master code, the BUF12840 switches on
• High-speed mode (also called Hs mode): allows a
its Hs mode filters, and communicates at up to
clock frequency of up to 3.4MHz.
3.4MHz. Additional high-speed transfers may be
The BUF12840 is fully compatible with all three
transmitted without resending the Hs mode byte by
modes. No special action is required to use the
generating a repeat START without a STOP. The
device in Standard or Fast modes, but High-speed
BUF12840 switches out of Hs mode with the next
mode must be activated. To activate High-speed
STOP condition.
mode, send a special address byte of 00001 xxx, with
SCL ≤ 400kHz, following the START condition; where
xxx are bits unique to the Hs-capable master, which
can be any value. This byte is called the Hs master
8 Copyright © 2010–2011, Texas Instruments Incorporated