Datasheet

POR
Time=0
5ms
PORActivatesMasterMode
EEPROMAddress+Acknowledge
Idle
5ms
Wait
5 6 7
5 6 7 8 9 19
5
6
7
8 14 15
5 6 7 n n+1 13 14 15
25
n n+1 m (m+10ms)
nth
EEPROM
Queryif
(n-1)Failed
mthQuerySuccessful,
DataNowDownloaded
FromEEPROM
EEPROMDataLoaded
BUF12840EnetersSlaveMode
5ms
Wait
5ms
Wait
10th
EEPROM
Queryif
9thFailed
4th
EEPROM
Queryif
3rdFailed
4thQuerySuccessful,
DataNowDownloaded
FromEEPROM
EEPROMDataLoaded
BUF12840EnetersSlaveMode
10thQuerySuccessful,
DataNowDownloaded
FromEEPROM
EEPROMDataLoaded
BUF12840EnetersSlaveMode
5ms
Wait
1st
EEPROM
Query
2nd
EEPROM
Queryif
1stFailed
3rd
EEPROM
Queryif
2ndFailed
nth
EEPROM
Queryif
(n-1)Failed
9th
EEPROM
Queryif
8thFailed
10th
EEPROM
Queryif
9thFailed
EEPROMDataLoaded
BUF12840EnetersSlaveMode
1ms
900 sm
EN(high,'1')shouldbeenabledpriortoaquerypulseand
beforethe10thqueryattempttoremaininmastermode.
Time(ms)
Time(ms)
Time(ms)
Time(ms)
Time(ms)
FramingPulseforEEPROMQuery
1.5V
SDA
EN
GeneralCase
Case1
EEPROMReadyon
FourthReadAttempt
Case2
EEPROMReadyon
TenthReadAttempt
Case3
EEPROMNotReady
in5ms
5ms
10ms
1st
EEPROM
Query
2nd
EEPROM
Queryif
1stFailed
3rd
EEPROM
Queryif
2ndFailed
1st
EEPROM
Query
2nd
EEPROM
Queryif
1stFailed
3rd
EEPROM
Queryif
2ndFailed
1st
EEPROM
Query
2nd
EEPROM
Queryif
1stFailed
3rd
EEPROM
Queryif
2ndFailed
10ms
10ms
¼
¼
¼
¼
¼
¼
¼
BUF12840
SBOS519A –OCTOBER 2010– REVISED JULY 2011 www.ti.com
Figure 14. POR Master Mode Auto Read Function and Timing Diagram
MASTER MODE CLOCK SPEED The BUF12840 can only synchronize with other
masters that operate in Standard Mode (clock speed
In master mode, the BUF12840 generates it own
≤ 100kHz). It is not recommended to have another
clock and puts it on the SCL pin. The frequency is
master with higher speed operating at the same time.
nominally 87kHz, with a maximum value of 100kHz
Note that once in slave mode, the BUF12840
and a minimum value of 71kHz. When the BUF12840
supports clock speeds up to 3.4MHz.
has exclusive access to the two-wire bus, it takes a
maximum of 10ms to download both banks of data
GENERAL-CALL RESET
from the moment power becomes valid. However,
when the BUF12840 is in master mode, if there is
The BUF12840 responds to software general-call
contention on the two-wire bus because of another
reset (GCR). Upon receiving a GCR command, the
active master, the BUF12840 activates its clock
BUF12840 enters master mode and downloads data
synchronization and arbitration engine. In this case, it
from the EEPROM as if the power supply was just
may take longer for the BUF12840 to finish the
switched on.
download.
12 Copyright © 2010–2011, Texas Instruments Incorporated