Datasheet

www.ti.com BUF08821EVM-USB Hardware Overview
3.7.3 JMP2: VSD Control Setting
Jumper JMP2 selects where the BUF08821 digital supply pin is connected. If JMP2 is set in the INT
position, the V
SD
pin is connected to the switchable V
DUT
signal generated from the USB_DIG_Platform.
This voltage can be set to either 3.3V or 5V, depending on how JUMP9 on the USB_DIG_Platform is set.
While JMP2 is set to the INT position, the V
SD
Power button on the BUF08821 software is able to control
whether the V
DUT
supply voltage is turned on or off.
When JMP2 is set in the EXT position, an external supply connected to terminal T2 can be used to
provide the digital supply voltage for the BUF08821.
3.7.4 JMP3: BKSEL Control Setting
Jumper JMP3 determines how the OTP memory bank selection is controlled. There are two settings for
JMP3. The INT position specifies that control of the BKSEL pin is handled on the BUF08821EVM-USB
board by the BKSEL switch. The EXT position for JMP3 allows for an external control signal connected to
terminal T3 to determine the selection of which OTP bank to be used.
3.7.5 JMP4: I
2
C SDA Control Setting
Jumper JMP4 selects where the BUF08821 I
2
C SDA pin is connected. If JMP4 is set in the INT position,
the I
2
C data signal is generated from the I2C_SDA_ISO signal from the USB_DIG_Platform.
When JMP4 is set in the EXT position, an external source connected to SDA pin of terminal T4 can be
used to provide the I
2
C SDA signal for the BUF08821.
3.7.6 JMP5: I
2
C Address Hardware Setting
Jumper JMP5 is used to set the hardware setting for the A0 I
2
C address pin on the BUF08821. Using
JMP5, the A0 address can be set to either logic '1' or logic '0' to allow for two unique I
2
C addresses. See
Section 5.2.1xx on how to configure the BUF08821EVM-USB software to match the JMP1 hardware
setting.
3.7.7 BUF08821 Device Placement
The BUF08821EVM-USB offers the user two separate locations on the PCB where the BUF08821 test
device can be installed. Location U2 allows for a BUF08821 device that is soldered down on a DIP
adaptor board to be installed on the BUF08821EVM-USB. The output capability of the BUF08821 device
that is soldered on this adaptor board can be fully evaluated. The PowerPAD™ of this soldered BUF08821
is connected correctly, allowing the device to dissipate the necessary power while being evaluated.
The U1 location on the BUF08821EVM-USB is a 20-pin test socket that allows the user to evaluate and
program many devices very quickly. One drawback to this socket is that there is no connection to the
PowerPAD of the BUF08821. Because of this limitation, while in this socket, the BUF08821 device cannot
operate at its full output capability as a result of thermal dissipation restrictions.
CAUTION
Only one location should be populated at a time. The use of both locations
simultaneously will damage one or both of the devices being tested.
3.7.8 Terminal Strip TPG1
Terminal strip TPG1 provides the individual output signals on a single row of headers as well as a row of
test points. This footprint provides the user with multiple options regarding how to interface the output
signals of the BUF08821 with the available display panel. Users can develop a custom cable to connect
the headers to their respective panels directly, or to solder directly to the individual test points.
13
SBOU095–March 2011 BUF08821EVM-USB User Guide and Software Tutorial
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