Datasheet
bq78PL116
www.ti.com
SLUSAB8B –OCTOBER 2010– REVISED FEBRUARY 2011
A variety of techniques, such as simple terminal voltage, terminal voltage corrected for impedance and
temperature effects, or state-of-charge balancing, is easily implemented by the bq78PL116. By tracking the
balancing required by individual cells, overall battery safety is enhanced, often allowing early detection of soft
shorts or other cell failures. Balancing is achieved between all cells within the pack as dynamically determined by
the bq78PL116.
The bq78PL116 supports the following configurable cell-balancing features:
• Turbo-pump mode. When enabled, this allows 60%–70% pump availability when there are no active safety
events and current is not flowing. While in turbo-pump mode, temperature rate-of-rise features are not
available.
• Option to disable cell balancing during discharge
• Option to disable cell balancing during charge
• Test mode operation that allows for convenient production-line testing of PowerPump circuitry
Outputs
Charge Control
The CHG and PRE outputs are ordinarily used to drive MOSFET transistors controlling charge to the cell stack.
Charge or precharge mode is selected based on the present cell voltage compared to the user-definable cell
precharge, undervoltage, and temperature thresholds. When below these limits, the PRE signal is active and the
CHG signal is inactive. This turns on the precharge MOSFET and is used to charge a depleted system through a
current-limiting series resistor. When all cell voltages are above the limit and the temperature is above the charge
temperature minimum, then the CHG output also becomes active and enables the charge MOSFET to turn on,
providing a high-current path between charger and battery cells.
The CHG and PRE MOSFET control outputs are both disabled (low) when any cell reaches the safety cutoff limit
or temperature threshold. During active charging modes (and above cell voltage thresholds), the discharge
MOSFET is also enabled to avoid excessive heating of the body diode. Similarly, the charge MOSFET is active
during discharge, provided current flow is in the correct direction and no safety violations are present.
The CHG and PRE outputs are intended to drive buffer transistors acting as inverting level shifters.
Discharge Control
The DSG output operates similarly to control-system discharging. It is enabled (high) by default. If a cell voltage
falls below a programmable threshold, or excessive current or other safety related fault is sensed, the DSG
output is disabled (low) to prevent damage to the cells.
All facets of safely charging and discharging the cell stack are controlled by user-definable parameters which
provide precise control over MOSFET states. Both system and cell over- and undervoltage limits are provided, as
well as programmable hysteresis to prevent oscillation. Temperature and current thresholds are also provided,
each with independent timers to prevent nuisance activations.
The DSG output is intended to drive a buffer transistor acting as an inverting level-shifter.
Display
The bq78PL116 shows state-of-charge indication on LED, static liquid crystal, and electronic paper displays or
EPDs in a bar-graph-type format. The parameter set allows selection of display type and configuration.
PSH/BP/TP is a multifunction pin. In LED display mode, PSH serves as an input that monitors for closure of a
state-of-charge indicator (SOCi) push-button switch. In LCD mode, this pin is used to drive the LCD backplane.
In EPD mode, this pin drives the top plane common signal of the display.
In LED display mode, the signals LED1/SEG1–LED5/SEG5 are current-sinking outputs designed to drive
low-current LEDs.
In LCD and EPD modes, the LED1/SEG1–LED5/SEG5 pins drive the active segments through external buffer
transistors. In EPD mode, the FIELD pin drives the display background field.
© 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Link(s): bq78PL116