Datasheet

bq76PL536A
SLUSAD3A JUNE 2011REVISED AUGUST 2012
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The PRESULT_A register holds the parity result bits for the first eight Group3 protected registers.
PARITY_H REGISTER (0x25) (PRESULT_B (R/O))
7 6 5 4 3 2 1 0
0 0 0 0 USER4 USER3 USER2 USER1
The PRESULT_B register holds the parity result bits for the second eight Group3 protected registers.
ADC_CONTROL REGISTER (0x30)
7 6 5 4 3 2 1 0
ADC_ON TS2 TS1 GPAI CELL_SEL[2] CELL_SEL[1] CELL_SEL[0]
The ADC_CONTROL register controls some features of the bq76PL536A.
[7] not implemented. Must be written as 0.
[6] (ADC_ON): This bit forces the ADC subsystem ON. This has the effect of eliminating internal start-up
and settling delays, but increases current consumption.
0 = Auto mode. ADC subsystem is OFF until a conversion is requested. The ADC is
turned on, a wait is applied to allow the reference to stabilize. Automatically
returns to OFF state at end of requested conversion. Note that there is a start-up
delay associated with turning the ADC to the ON state in this mode.
1 = ADC subsystem is ON, regardless of conversion state. Power consumption is
increased.
[5..4] (TS[1]..[0]): These two bits select whether any of the temperature sensor inputs are to be measured
on the next conversion sequence start.
TS[1] TS[0] Measure T
0 0 None (default)
0 1 TS1
1 0 TS2
1 1 Both
[3] (GPAI): This bit enables and disables the GPAI input to be measured on the next conversion-
sequence start.
0 = GPAI is not selected for measurement.
1 = GPAI is selected for measurement.
[2–0] (CELL_SEL): These three bits select the series cells for voltage measurement translation on the next
conversion sequence start.
CELL_SEL[2] CELL_SEL[1] CELL_SEL[0] SELECTED CELL
0 0 0 Cell 1 only
0 0 1 Cells 1-2
0 1 0 Cells 1-2-3
0 1 1 Cells 1-2-3-4
1 0 0 Cells 1-2-3-4-5
1 0 1 Cells 1-2-3-4-5-6
Other Cell 1 only
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