Datasheet

bq76PL536A
SLUSAD3A –JUNE 2011–REVISED AUGUST 2012 www.ti.com
The data packet can be periodically expanded to accommodate temperature and GPAI readings as well as
device status as needed by changing the REGISTER_FIRST offset and LENGTH values.
Device Addressing
Each individual device in the series stack requires an address to allow it to be communicated with. Each
bq76PL536A has a CS_S and CS_N that are used in assigning addresses. Once addresses have been
assigned, the normal operation of the CS_N/S lines is asserted (logic high) during communications, and the
appropriate bq76PL536A in the stack responds according to the address transmitted as part of the packet.
When the bq76PL536A is reset, the DEVICE_STATUS[AR] (address request) flag is cleared, the address
register is set to 0x00, and ALERT_S is set and passed down the stack. In this state, where address = 0x00, the
CS_N signal is forced to a de-asserted state (CS is not passed north when an address = 0). In this manner, after
a reset the host is assured that a response at address 0x00 is from the first physical device in the stack. After
address assignment of the current device, the host is assured that the next response at address 0x00 is from the
next physical device in the stack.
Once a valid address is assigned to the device, the CS_N signal responds normally, and follows the CS_H or
CS_S signal, propagating to the next device in the stack. Valid addresses are in the range 0x01 through 0x3e.
0x00 is reserved for device discovery after reset. 0x3f is reserved as a broadcast address for all devices.
Designer Note: Broadcast messages are only received by devices with a valid address, and the next higher
device. Any device with an address of 0x00 blocks messages to devices above it. A broadcast message may
not be received by all devices in a stack in situations where some devices do not have a valid address.
30 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated
Product Folder Links :bq76PL536A