Datasheet
bq76PL536A
SLUSAD3A –JUNE 2011–REVISED AUGUST 2012
www.ti.com
Cell Balance Control Safety Timer
The CBx outputs are cleared when the internal safety timer expires. The internal safety timer (CB_TIME) value is
programmed in units of seconds or minutes (range set by CB_CTRL bit 7) with an accuracy of ±10%.
The timer begins when any CB_CTRL bit changes from 0 to 1. The timer is reset if all CB_CTRL bits are
modified by the host from 1 to 0, or by expiration of the timing period. The timing begins counting the
programmed period from start each time the CB_CTRL[] register is programmed from a zero to a non-zero value
in the lower six bits. In example, if the CB_TIME[] is set for 30 s, then one or more bits are set in the CB_CTRL[]
register to balance the corresponding cells; then after 10 s the user firmware sets CB_CTRL[] to 0x00, takes a
measurement, then reprograms CB_CTRL[] with the same or new bit pattern, the timer begins counting 30 s
again before expiring and disabling balancing. This restart occurs each time the CB_CTRL bits are set to a non-
zero value. If this is done at a greater rate than the balancing period for which timer CB_TIME[] is set, balancing
is effectively never disabled – until the timer is either allowed to expire without changing the CB_CTRL[] register
to a non-zero value, or the CB_CTRL[] register is set to zero by the user firmware. If the CB_CTRL[] register is
not manipulated from zero to non-zero while the timer is running, the timer expires as expected. Alterations of the
value from a non-zero to a different non-zero value do not restart the timer (i.e., from 0x02 to 0x03, etc).
While the timer is running, the host may set or reset any bit in the CB_CTRL[] register at any time, and the CBx
output follows the bit.
The host may re-program the timer at any time. The timer must always be programmed to allow the CBx outputs
to be asserted. While the timer is non-zero, the CB_CTRL[] settings are reflected at the outputs.
During periods when the timer is actively running (not expired), then DEVICE_STATUS[CBT] is set.
OTHER FEATURES AND FUNCTIONS
Internal Voltage Regulators
The bq76PL536A derives power from the BAT pin using several internal low dropout (LDO) voltage regulators.
There are separate LDOs for internal analog circuits (5 V at LDOA), digital circuits (5 V at LDOD1 and LDOD2),
and external, user circuits (5 V at REG50). The BAT pin should be connected to the most-positive cell input from
cell 3, 4, 5, or 6, depending on the number of cells connected. Locate filter capacitors as close to the IC as
possible. The internal LDOs and internal V
REF
should not be used to power external circuitry, with the exception
that LDODx should be used to source power to any external pullup resistors.
Internal 5-V Analog Supply
The internal analog supply should be bypassed at the LDOA pin with a good-quality, low-ESR, 2.2-μF ceramic
capacitor.
Internal 5-V Digital Supply
The internal digital supply should be bypassed at the LDOD1(2) pin with a good-quality, low-ESR, 2.2-μF ceramic
capacitor. The two pins are connected internally and provided to enhance single-pin failure-mode fault tolerance.
They should also be connected together externally.
Designer Note: Because the LDODx inputs are pulled briefly to ~7 V during programming, the LDODx pins
should not be used as sources for pullups to 5-V digital pins, such as HSEL and SPI(bus)_H connected pins.
Use VREG50 instead, unless all programming is completed prior to mounting on the application PCB, in
which case LDODx is a good choice.
Low-Dropout Regulator (REG50)
The bq76PL536A has a low-dropout (LDO) regulator provided to power the thermistors and other external
circuitry. The input for this regulator is V
BAT
. The output of REG50 is typically 5 V. A minimum 2.2-μF capacitor is
required for stable operation. The output is internally current-limited. The output is reduced to near zero if excess
current is drawn, causing die temperatures to rise to unacceptable levels.
The 2.2-µF output capacitor is required whether REG50 is used in the design or not.
REG50 is disabled in SLEEP mode, and may be turned off under thermal-shutdown conditions, and therefore
should not be used as a pullup source for terminating device pins where required.
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