Datasheet
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bq76925
20
19
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11
VCTL
BAT
VC6
VC5
VC4
VC3
VC2
VC1
VC0
VSS
SENSEP
ALERT
VIOUT
VCOUT
VTB
VREF
SDA
SCL
V3P3
SENSEN
24 23 22 21 20
7 8 9 10 11
18
17
16
15
14
1
2
3
4
5
bq76925
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13
12
6
VCTL
BAT
VC6
VC5
VC4
VC3
VC2
VC1
SENSEN
VSS
SENSEP
ALERT
VIOUT
VCOUT
VTB
VREF
SDA
SCL
V3P3
VC0
NC
NC
NC
NC
PW PACKAGE
(TOP VIEW)
RGE PACKAGE
(TOP VIEW)
bq76925
SLUSAM9B –JULY 2011– REVISED DECEMBER 2011
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
PIN DIAGRAMS
PIN FUNCTIONS
PIN NO.
NAME TYPE DESCRIPTION
TSSOP QFN
1 23 VCTL Output 3.3-V Regulator control voltage
(1)
2 24 BAT Power Supply voltage, tied to most positive cell
3 1 VC6 Input Sense voltage for most positive cell
4 2 VC5 Input Sense voltage for second most positive cell
5 3 VC4 Input Sense voltage for third most positive cell
6 4 VC3 Input Sense voltage for fourth most positive cell
7 5 VC2 Input Sense voltage for fifth most positive cell
8 6 VC1 Input Sense voltage for least positive cell
9 7 VC0 Input Sense voltage for negative end of cell stack
10 8 VSS Power Ground
9 NC NA No Connection (leave open)
10 NC NA No Connection (leave open)
11 11 SENSEN Input Negative current sense
12 12 SENSEP Input Positive current sense
13 13 ALERT Output Overcurrent alert (open drain)
14 14 VIOUT Output Current measurement voltage
15 15 VCOUT Output Cell measurement voltage
16 16 VTB Output Bias voltage for thermistor network
17 17 VREF Output Reference voltage for ADC
18 18 SDA Input / Output I
2
C Data (open drain)
19 19 SCL Input I
2
C Clock (open drain)
20 20 V3P3 Output 3.3-V Regulator
21 NC NA No Connection (leave open)
22 NC NA No Connection (leave open)
(1) When a bypass FET is used to supply the regulated 3.3-V load current, VCTL automatically adjusts to keep V3P3 = 3.3 V. If VCTL is
tied to BAT, the load current is supplied through V3P3.
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