Datasheet
A6 A5 A0
...
R/W
D7 D6 D0
...
C7 C6 C0
...
Start Address
Data
CRC
(optional)
Stop
SCL
SDA
ACK
ACK ACK
A6 A5 A0
...
R/W
D0
...
C7 C6 C0
...
Start Address Stop
SCL
SDA
ACK
D7 D6
ACK
NACK
Slave
Drives CRC
(optional)
Master
Drives NACK
Slave
Drives Data
bq76925
SLUSAM9B –JULY 2011–REVISED DECEMBER 2011
www.ti.com
Bus Write Command to bq76925
The Host writes to the registers of the bq76925 as shown in Figure 7. The bq76925 acknowledges each received
byte by pulling the SDA line low during the acknowledge period.
The Host may optionally send a CRC after the Data byte as shown. The CRC for write commands is enabled by
writing the CRC_EN bit in the CONFIG_2 register. If the CRC is not used, then the Host generates the Stop
condition immediately after the bq76925 acknowledges receipt of the Data byte.
When the CRC is disabled, the bq76925 will act on the command on the first rising edge of SCL following the
ACK of the Data byte. This occurs as part of the normal bus setup prior to a Stop. If a CRC byte is sent while the
CRC is disabled, the first rising edge of the SCL following the ACK will be the clocking of the first bit of the CRC.
The bq76925 does not distinguish these two cases. In both cases, the command will complete normally, and in
the latter case the CRC will be ignored.
Figure 7. I
2
C Write Command
Bus Read Command from bq76925
The Host reads from the registers of the bq76925 as shown in Figure 8. This protocol is similar to the write
protocol, except that the slave now drives data back to the Host. The bq76925 acknowledges each received byte
by pulling the SDA line low during the acknowledge period. When the bq76925 sends data back to the Host, the
Host drives the acknowledge.
The Host may optionally request a CRC byte following the Data byte as shown. The CRC for read commands is
always enabled, but not required. If the CRC is not used, then the Host simply NACK’s the Data byte and then
generates the Stop condition.
Figure 8. I
2
C Read Command
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