Datasheet

bq3060
SLUS928A –MARCH 2009–REVISED NOVEMBER 2009 www.ti.com
INTERNAL LDO
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
REG
Regulator output voltage I
REG27
= 10 mA T
A
= –40°C to 85°C 2.5 2.7 2.75 V
Regulator output change
ΔV
(REGTEMP)
I
REG
= 10 mA T
A
= –40°C to 85°C ±0.5%
with temperature
ΔV
(REGLINE)
Line regulation I
REG
= 10 mA ±2 ±4 mV
ΔV
(REGLOAD)
Load regulation I
REG
= 0.2 to 10 mA ±20 ±40 mV
I
(REGMAX)
Current limit 25 50 mA
SRx WAKE FROM SLEEP
PARAMETER TEST CONDITION MIN TYP MAX UNIT
V
WAKE
= 1.2 mV 0.2 1.2 2 mV
V
WAKE
= 2.4 mV 0.4 2.4 3.6
V
WAKE_ACR
Accuracy of V
WAKE
V
WAKE
= 5 mV 2 5 6.8
V
WAKE
= 10 mV 5.3 10 13
V
WAKE_TCO
Temperature drift of VWAKE accuracy 0.5 %/°C
t
WAKE
Time from application of current and wake of bq3060 0.2 1 ms
COULOMB COUNTER
PARAMETER TEST CONDITION MIN TYP MAX UNIT
Input voltage range -0.20 0.25 V
Conversion time Single conversion 250 ms
Effective resolution Single conversion 15 Bits
Integral nonlinearity T
A
= –25°C to 85°C ±0.007 ±0.034 %FSR
Offset error
(1)
T
A
= –25°C to 85°C 10 μV
Offset error drift 0.3 0.5 μV/°C
Full-scale error
(2)
–0.8% 0.2% 0.8%
Full-scale error drift 150 PPM/°C
Effective input resistance 2.5 MΩ
(1) Post Calibration Performance
(2) Uncalibrated performance. This gain error can be eliminated with external calibration.
ADC
PARAMETER TEST CONDITION MIN TYP MAX UNIT
Input voltage range –0.2 0.8×V
REG27
V
Conversion time 31.5 ms
Resolution (no missing codes) 16 Bits
Effective resolution 14 15 Bits
Integral nonlinearity ±0.020 %FSR
Offset error
(1)
70 160 μV
Offset error drift 1 μV/°C
Full-scale error V
IN
= 1 V –0.8% ±0.2% 0.4%
Full –scale error drift 150 PPM/°C
Effective input resistance 8 MΩ
(1) Channel to channel offset
6 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): bq3060