Datasheet

t
LOW
SCLK
SDATA
P S
t
BUF
t
HD:STA
t
R
t
HD:DAT
t
HIGH
t
F
t
SU:DAT
t
SU:STA
t
HD:STA
S P
t
SU:STO
Start Stop
t
LOW:SEXT
t
LOW:MEXT
SCLK
ACK
1
SCLK
ACK
1
t
LOW:MEXT
t
LOW:MEXT
SCLK
SDATA
t
TIMEOUT
MeasurementIntervals
TimingMeasurementIntervals
bq3060
SLUS928A –MARCH 2009–REVISED NOVEMBER 2009 www.ti.com
SMBus
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
f
SMB
SMBus operating frequency Slave mode, SMBC 50% duty cycle 10 100 kHz
f
MAS
SMBus master clock frequency Master mode, no clock low slave extend 51.2 kHz
t
BUF
Bus free time between start and stop 4.7 μs
t
HD:STA
Hold time after (repeated) start 4.0 μs
t
SU:STA
Repeated start setup time 4.7 μs
t
SU:STO
Stop setup time 4.0 μs
Receive mode 0
t
HD:DAT
Data hold time ns
Transmit mode 300
t
SU:DAT
Data setup time 250 ns
t
TIMEOUT
Error signal/detect See
(1)
25 35 ms
t
LOW
Clock low period 4.7 μs
t
HIGH
Clock high period See
(2)
4.0 50 μs
t
LOW:SEXT
Cumulative clock low slave extend time See
(3)
25 ms
Cumulative clock low master extend
t
LOW:MEXT
See
(4)
10 ms
time
t
F
Clock/data fall time See
(5)
300 ns
t
R
Clock/data rise time See
(6)
1000 ns
(1) The bq3060 times out when any clock low exceeds t
TIMEOUT
(2) t
HIGH
, Max, is the minimum bus idle time. SMBC = SMBD = 1 for t > 50 μs causes reset of any transaction involving bq3060 that is in
progress. This specification is valid when the NC_SMB control bit remains in the default cleared state (CLK[0]=0). If NC_SMB is set then
the timeout is disabled.
(3) t
LOW:SEXT
is the cumulative time a slave device is allowed to extend the clock cycles in one message from initial start to the stop.
(4) t
LOW:MEXT
is the cumulative time a master device is allowed to extend the clock cycles in one message from initial start to the stop.
(5) Rise time t
R
= V
ILMAX
– 0.15) to (V
IHMIN
+ 0.15)
(6) Fall time t
F
= 0.9V
DD
to (V
ILMAX
– 0.15)
(1) SCLK
ACK
is the acknowledge-related clock pulse generated by the master.
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