Datasheet

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PACK
ZVCHG
PMS
REG
CHG
DSG
BAT
PCHG-FET
R
(PCHG)
4.7 mF
Battery
DSG-FET CHG-FET
Pack+
I
(FASTCHG)
CV
CC
Charger
DC Input
bq29312A
I
(FASTCHG)
= Fast Current
OD
Host
SCLK SDATA
ID
VSD
ID = (V
(PACK)
- V
(BAT)
- V
DS
)/R
(PCHG)
bq29312A
SLUS629A – JANUARY 2005 – REVISED AUGUST 2005
APPLICATION INFORMATION (continued)
Figure 13. Precharge FET Mode Circuit Diagram
The PCHG-FET is driven by the OD output, and the resister R
(PCHG)
in the precharge path limits the precharge
current. When OD = GND, then the PCHG-FET is ON. The precharge current is represented by the following
equation:
I
(PCHG)
= ID = ( V
(PACK)
- V
(BAT)
- V
DS
)/R
(PCHG)
• A load curve of the PCHG-FET is shown in Figure 14 . When the drain-source voltage (V
DS
) is high enough,
the PCHG-FET operates in the linear region and has low resistance. By approximating V
DS
as 0 V, the
precharge current, I
(PCHG)
is expressed as below.
• I
(PCHG)
= ( V
(PACK)
- V
(BAT)
)/R
(PCHG)
Figure 14. PCHG-FET ID—VDS Characteristic
During the precharge phase, CHG-FET is turned OFF and PCHG-FET is turned ON. When all the cell voltages
measured by the host reach the fast charge threshold, the host controller turns ON CHG-FET and turns OFF
PCHG-FET. The signal timing is shown in Figure 15 .
When the charger is connected, CHG-FET, DSG-FET and PCHG-FET are already in the OFF state. When the
charger in connected, it applies V
(PACK)
. The bq29312A REG output then becomes active and supplies power to
the host controller. As the host controller starts up, it turns on the OD pin and the precharge current is enabled.
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