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OLV: Overload Voltage Threshold Register
OLT: Overload Blanking Delay Time Register
SCC: Short Circuit in Charge Configuration Register
bq29312A
SLUS629A – JANUARY 2005 – REVISED AUGUST 2005
CELL_SEL b4–b7 (CB0–CB3): These 4 bits select the series cell for cell balance bypass path.
CELL SEL b4 (CB0): This bit enables or disables the bottom series cell balance charge bypass path.
0 = disable bottom series cell balance charge bypass path (default).
1 = enable bottom series cell balance charge bypass path.
CELL SEL b5 (CB1): This bit enables or disables the second lowest series cell balance charge bypass path.
0 = disable series cell balance charge bypass path (default).
1 = enable series cell balance charge bypass path.
CELL SEL b6 (CB2): This bit enables or disables the second highest cell balance charge bypass path.
0 = disable series cell balance charge bypass path (default).
1 = enable series cell balance charge bypass path.
CELL SEL b7 (CB3): This bit enables or disables the highest series cell balance charge bypass path.
0 = disable series cell balance charge bypass path (default).
1 = enable series cell balance charge bypass path.
OLV REGISTER (0x05)
7 6 5 4 3 2 1 0
0 0 0 OLV4 OLV3 OLV2 OLV1 OLV0
OLV (b4–b0): These five bits select the value of the overload threshold with a default of 00000.
OLV (b4–b0) configuration bits with corresponding voltage threshold
00000 0.050 V 01000 0.090 V 10000 0.130 V 11000 0.170 V
00001 0.055 V 01001 0.095 V 10001 0.135 V 11001 0.175 V
00010 0.060 V 01010 0.100 V 10010 0.140 V 11010 0.180 V
00011 0.065 V 01011 0.105 V 10011 0.145 V 11011 0.185 V
00100 0.070 V 01100 0.110 V 10100 0.150 V 11100 0.190 V
00101 0.075 V 01101 0.115 V 10101 0.155 V 11101 0.195 V
00110 0.080 V 01110 0.120 V 10110 0.160 V 11110 0.200 V
00111 0.085 V 01111 0.125 V 10111 0.165 V 11111 0.205 V
OLT REGISTER (0x06)
7 6 5 4 3 2 1 0
0 0 0 0 OLT3 OLT2 OLT1 OLT0
OLT(b3–b0): These four bits select the value of the delay time for overload with a default of 0000.
OLT(b3–b0) configuration bits with corresponding delay time
0000 1 ms 0100 9 ms 1000 17 ms 1100 25 ms
0001 3 ms 0101 11 ms 1001 19 ms 1101 27 ms
0010 5 ms 0110 13 ms 1010 21 ms 1110 29 ms
0011 7 ms 0111 15 ms 1011 23 ms 1111 31 ms
SCC REGISTER (0x07)
7 6 5 4 3 2 1 0
SCCT3 SCCT2 SCCT1 SCCT0 SCCV3 SCCV2 SCCV1 SCCV0
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