Datasheet

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Communications
A5
SCLK
SDATA
A6 ACKR/WA0A4
R5R6R7 R0
D7ACK D6 D5 D0 ACK
0 0 00
… … …
… … …
Slave Address Register Address DataStart Stop
Note: Slave = bq29312
A5
SCLK
SDATA
Stop
A6 ACKR/WA0 R6R7 R0 A6ACK A0 R/W ACK D7
0 1 0
D6 D0 NACK
… … … …
… … …
0 0
Slave Address Register Address
Data
Start
Note: Slave = bq29312
Slave Address
Slave Drives
The Data
Master Drives
NACK and Stop
A5
SCLK
SDATA
Stop
A6 ACKR/WA0 R6R7 R0 A6ACK A0 R/W ACK D7
0 0 0
D0 NACKA5
Stop Start
… … …
…
…
…
……
Slave Address
Register
Address
Start
Note: Slave = bq29312
Slave Address
Slave Drives
The Data
Master Drives
NACK and Stop
bq29312A
SLUS629A – JANUARY 2005 – REVISED AUGUST 2005
The I
2
C compatible serial communications provides read and write access to the bq29312A data area. The data
is clocked via separate data (SDATA) and clock (SCLK) pins. The bq29312A acts as a slave device and does
not generate clock pulses. Communication to the bq29312A is provided from GPIO pins or an I
2
C supporting port
of a host system controller. The slave address for the bq29312A is 7 bits and the value is 0100 000 (0x20).
(MSB) I
2
C ADDRESS +R/W BIT (LSB)
(MSB) I
2
C ADDRESS (0x20) (LSB)
Write
(1)
0
0 1 0 0 0 0 0
Read 1
(1) Bit 0: 0 = write, 1= read
The bq29312A does not have the following functions compatible with the I
2
C specification.
• The bq29312A is always regarded as a slave.
• The bq29312A does not return a NACK for an invalid register address.
• The bq29312A does not support the general code of the I
2
C specification, and therefore does not return an
ACK.
• The bq29312A does not support the address auto increment, which allows continuous reading and writing.
• The bq29312A allows data to be written to or read from the same location without resending the location
address.
Figure 4. I
2
C-Bus Write to bq29312A
Figure 5. I
2
C-Bus Read from bq29312A: Protocol A
Figure 6. I
2
C-Bus Read from bq29312A: Protocol B
16